JPS53101942A - Data storage equipment - Google Patents

Data storage equipment

Info

Publication number
JPS53101942A
JPS53101942A JP1608377A JP1608377A JPS53101942A JP S53101942 A JPS53101942 A JP S53101942A JP 1608377 A JP1608377 A JP 1608377A JP 1608377 A JP1608377 A JP 1608377A JP S53101942 A JPS53101942 A JP S53101942A
Authority
JP
Japan
Prior art keywords
data storage
storage equipment
data
clockes
freedom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1608377A
Other languages
Japanese (ja)
Other versions
JPS5925255B2 (en
Inventor
Masanobu Akagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP52016083A priority Critical patent/JPS5925255B2/en
Publication of JPS53101942A publication Critical patent/JPS53101942A/en
Publication of JPS5925255B2 publication Critical patent/JPS5925255B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To obtain the multi-function equipment by making the simple logical operation possible between read and write operations and by giving the number of degrees of freedom to the contents and purpose for use of system clockes or data for synchronization.
JP52016083A 1977-02-18 1977-02-18 data storage device Expired JPS5925255B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52016083A JPS5925255B2 (en) 1977-02-18 1977-02-18 data storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52016083A JPS5925255B2 (en) 1977-02-18 1977-02-18 data storage device

Publications (2)

Publication Number Publication Date
JPS53101942A true JPS53101942A (en) 1978-09-05
JPS5925255B2 JPS5925255B2 (en) 1984-06-15

Family

ID=11906642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52016083A Expired JPS5925255B2 (en) 1977-02-18 1977-02-18 data storage device

Country Status (1)

Country Link
JP (1) JPS5925255B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262253A (en) * 1984-06-07 1985-12-25 Agency Of Ind Science & Technol Memory data processing circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49112539A (en) * 1973-02-23 1974-10-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49112539A (en) * 1973-02-23 1974-10-26

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262253A (en) * 1984-06-07 1985-12-25 Agency Of Ind Science & Technol Memory data processing circuit
JPH0364891B2 (en) * 1984-06-07 1991-10-08 Kogyo Gijutsuin

Also Published As

Publication number Publication date
JPS5925255B2 (en) 1984-06-15

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