JPS5292440A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS5292440A
JPS5292440A JP844776A JP844776A JPS5292440A JP S5292440 A JPS5292440 A JP S5292440A JP 844776 A JP844776 A JP 844776A JP 844776 A JP844776 A JP 844776A JP S5292440 A JPS5292440 A JP S5292440A
Authority
JP
Japan
Prior art keywords
control system
memory control
access request
request
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP844776A
Other languages
Japanese (ja)
Other versions
JPS5825299B2 (en
Inventor
Tsutomu Sumimoto
Masao Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP844776A priority Critical patent/JPS5825299B2/en
Publication of JPS5292440A publication Critical patent/JPS5292440A/en
Publication of JPS5825299B2 publication Critical patent/JPS5825299B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Abstract

PURPOSE:To enable for the main memory unit to be received for the channel access request skipping the instruction read out request, by sending rejecting signal to the access request from CPU other than under service for a constant time.
JP844776A 1976-01-30 1976-01-30 Memory control method Expired JPS5825299B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP844776A JPS5825299B2 (en) 1976-01-30 1976-01-30 Memory control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP844776A JPS5825299B2 (en) 1976-01-30 1976-01-30 Memory control method

Publications (2)

Publication Number Publication Date
JPS5292440A true JPS5292440A (en) 1977-08-03
JPS5825299B2 JPS5825299B2 (en) 1983-05-26

Family

ID=11693368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP844776A Expired JPS5825299B2 (en) 1976-01-30 1976-01-30 Memory control method

Country Status (1)

Country Link
JP (1) JPS5825299B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122692U (en) * 1982-02-16 1983-08-20 山口　敏彦 Ship Tarap

Also Published As

Publication number Publication date
JPS5825299B2 (en) 1983-05-26

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