JPS5249704A - Time division switchboard channel control mechanism - Google Patents

Time division switchboard channel control mechanism

Info

Publication number
JPS5249704A
JPS5249704A JP12530975A JP12530975A JPS5249704A JP S5249704 A JPS5249704 A JP S5249704A JP 12530975 A JP12530975 A JP 12530975A JP 12530975 A JP12530975 A JP 12530975A JP S5249704 A JPS5249704 A JP S5249704A
Authority
JP
Japan
Prior art keywords
time division
control mechanism
channel control
switchboard
division switchboard
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12530975A
Other languages
Japanese (ja)
Other versions
JPS5645479B2 (en
Inventor
Akira Horiki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12530975A priority Critical patent/JPS5249704A/en
Publication of JPS5249704A publication Critical patent/JPS5249704A/en
Publication of JPS5645479B2 publication Critical patent/JPS5645479B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored programme control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:The trunk memory is equipped between time slot memory and central processing unit inorder to secure an economical time division channel.
JP12530975A 1975-10-20 1975-10-20 Time division switchboard channel control mechanism Granted JPS5249704A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12530975A JPS5249704A (en) 1975-10-20 1975-10-20 Time division switchboard channel control mechanism

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12530975A JPS5249704A (en) 1975-10-20 1975-10-20 Time division switchboard channel control mechanism

Publications (2)

Publication Number Publication Date
JPS5249704A true JPS5249704A (en) 1977-04-21
JPS5645479B2 JPS5645479B2 (en) 1981-10-26

Family

ID=14906902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12530975A Granted JPS5249704A (en) 1975-10-20 1975-10-20 Time division switchboard channel control mechanism

Country Status (1)

Country Link
JP (1) JPS5249704A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4165394A (en) * 1977-02-16 1979-08-21 Ebauches S.A. Method of preparation of a substrate made of plastic material for its subsequent metallization

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5880985U (en) * 1981-11-30 1983-06-01 株式会社東芝 washing machine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4165394A (en) * 1977-02-16 1979-08-21 Ebauches S.A. Method of preparation of a substrate made of plastic material for its subsequent metallization

Also Published As

Publication number Publication date
JPS5645479B2 (en) 1981-10-26

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