JPS5247650B2 - - Google Patents
Info
- Publication number
- JPS5247650B2 JPS5247650B2 JP47003476A JP347672A JPS5247650B2 JP S5247650 B2 JPS5247650 B2 JP S5247650B2 JP 47003476 A JP47003476 A JP 47003476A JP 347672 A JP347672 A JP 347672A JP S5247650 B2 JPS5247650 B2 JP S5247650B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/02—Digital computers in general; Data processing equipment in general manually operated with input through keyboard and computation using a built-in program, e.g. pocket calculators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1407—General aspects irrespective of display type, e.g. determination of decimal point position, display with fixed or driving decimal point, suppression of non-significant zeros
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/04—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/01855—Interface arrangements synchronous, i.e. using clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Human Computer Interaction (AREA)
- Power Engineering (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP47003476A JPS5247650B2 (en17) | 1971-12-29 | 1971-12-29 | |
| DE2262750A DE2262750A1 (de) | 1971-12-29 | 1972-12-21 | Austastschaltung |
| CA159,998A CA975062A (en) | 1971-12-29 | 1972-12-27 | Blanking circuit |
| NL7217756A NL7217756A (en17) | 1971-12-29 | 1972-12-28 | |
| FR7246637A FR2170605A5 (en17) | 1971-12-29 | 1972-12-28 | |
| US00319444A US3851185A (en) | 1971-12-29 | 1972-12-29 | Blanking circuit |
| IT34037/72A IT974774B (it) | 1971-12-29 | 1972-12-29 | Circuito abblencatore particolar mente utile in un calcolatore elettronico |
| GB6003072A GB1419271A (en) | 1971-12-29 | 1972-12-29 | Blanking circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP47003476A JPS5247650B2 (en17) | 1971-12-29 | 1971-12-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4874743A JPS4874743A (en17) | 1973-10-08 |
| JPS5247650B2 true JPS5247650B2 (en17) | 1977-12-03 |
Family
ID=11558373
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP47003476A Expired JPS5247650B2 (en17) | 1971-12-29 | 1971-12-29 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3851185A (en17) |
| JP (1) | JPS5247650B2 (en17) |
| CA (1) | CA975062A (en17) |
| DE (1) | DE2262750A1 (en17) |
| FR (1) | FR2170605A5 (en17) |
| GB (1) | GB1419271A (en17) |
| IT (1) | IT974774B (en17) |
| NL (1) | NL7217756A (en17) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5160440A (en) * | 1974-11-22 | 1976-05-26 | Hitachi Ltd | Kotaiatsuyo mis fet suitsuchingukairo |
| JPS5233228U (en17) * | 1975-08-29 | 1977-03-09 | ||
| GB2041563B (en) * | 1979-01-11 | 1983-08-17 | Redifon Simulation Ltd | Visual display apparatus |
| GB2043290B (en) * | 1979-01-11 | 1983-08-17 | Redifon Simulation Ltd | Visual display apparatus |
| GB2043939A (en) * | 1979-01-11 | 1980-10-08 | Redifon Simulation Ltd | Visual display apparatus |
| JPS5849987A (ja) * | 1981-09-19 | 1983-03-24 | シャープ株式会社 | 表示駆動方式 |
| US4808861A (en) * | 1986-08-29 | 1989-02-28 | Texas Instruments Incorporated | Integrated circuit to reduce switching noise |
| US4789793A (en) * | 1987-02-24 | 1988-12-06 | Texas Instruments Incorporated | Integrated FET circuit to reduce switching noise |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1198084A (en) * | 1966-07-01 | 1970-07-08 | Sharp Kk | Information Control System |
| US3737673A (en) * | 1970-04-27 | 1973-06-05 | Tokyo Shibaura Electric Co | Logic circuit using complementary type insulated gate field effect transistors |
| US3720841A (en) * | 1970-12-29 | 1973-03-13 | Tokyo Shibaura Electric Co | Logical circuit arrangement |
| US3651342A (en) * | 1971-03-15 | 1972-03-21 | Rca Corp | Apparatus for increasing the speed of series connected transistors |
-
1971
- 1971-12-29 JP JP47003476A patent/JPS5247650B2/ja not_active Expired
-
1972
- 1972-12-21 DE DE2262750A patent/DE2262750A1/de active Pending
- 1972-12-27 CA CA159,998A patent/CA975062A/en not_active Expired
- 1972-12-28 FR FR7246637A patent/FR2170605A5/fr not_active Expired
- 1972-12-28 NL NL7217756A patent/NL7217756A/xx unknown
- 1972-12-29 GB GB6003072A patent/GB1419271A/en not_active Expired
- 1972-12-29 US US00319444A patent/US3851185A/en not_active Expired - Lifetime
- 1972-12-29 IT IT34037/72A patent/IT974774B/it active
Also Published As
| Publication number | Publication date |
|---|---|
| GB1419271A (en) | 1975-12-31 |
| NL7217756A (en17) | 1973-07-03 |
| FR2170605A5 (en17) | 1973-09-14 |
| US3851185A (en) | 1974-11-26 |
| JPS4874743A (en17) | 1973-10-08 |
| CA975062A (en) | 1975-09-23 |
| IT974774B (it) | 1974-07-10 |
| DE2262750A1 (de) | 1973-07-12 |