JPS5238851A - 4 22 1 code rapid carry circuit - Google Patents

4 22 1 code rapid carry circuit

Info

Publication number
JPS5238851A
JPS5238851A JP50114511A JP11451175A JPS5238851A JP S5238851 A JPS5238851 A JP S5238851A JP 50114511 A JP50114511 A JP 50114511A JP 11451175 A JP11451175 A JP 11451175A JP S5238851 A JPS5238851 A JP S5238851A
Authority
JP
Japan
Prior art keywords
carry circuit
code rapid
rapid carry
code
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50114511A
Other languages
Japanese (ja)
Inventor
Yukichi Sugimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP50114511A priority Critical patent/JPS5238851A/en
Publication of JPS5238851A publication Critical patent/JPS5238851A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/492—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/4925—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/491—Indexing scheme relating to groups G06F7/491 - G06F7/4917
    • G06F2207/4915—Using 4221 code, i.e. binary coded decimal representation with digit weight of 4, 2, 2 and 1 respectively

Abstract

PURPOSE:To speed up the addition by constituting 4221 code rapid carry circuit by use with half-adders at preceeding and latter stage.
JP50114511A 1975-09-22 1975-09-22 4 22 1 code rapid carry circuit Pending JPS5238851A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50114511A JPS5238851A (en) 1975-09-22 1975-09-22 4 22 1 code rapid carry circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50114511A JPS5238851A (en) 1975-09-22 1975-09-22 4 22 1 code rapid carry circuit

Publications (1)

Publication Number Publication Date
JPS5238851A true JPS5238851A (en) 1977-03-25

Family

ID=14639576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50114511A Pending JPS5238851A (en) 1975-09-22 1975-09-22 4 22 1 code rapid carry circuit

Country Status (1)

Country Link
JP (1) JPS5238851A (en)

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