JPS5222857A - Frequency synthesizer - Google Patents

Frequency synthesizer

Info

Publication number
JPS5222857A
JPS5222857A JP50098952A JP9895275A JPS5222857A JP S5222857 A JPS5222857 A JP S5222857A JP 50098952 A JP50098952 A JP 50098952A JP 9895275 A JP9895275 A JP 9895275A JP S5222857 A JPS5222857 A JP S5222857A
Authority
JP
Japan
Prior art keywords
frequency synthesizer
locked loop
phase locked
frequency
reduce output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50098952A
Other languages
Japanese (ja)
Inventor
Nobuo Haruyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP50098952A priority Critical patent/JPS5222857A/en
Publication of JPS5222857A publication Critical patent/JPS5222857A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:In a frequency synthesizer using a phase locked loop, to reduce output frequency fluctuation.
JP50098952A 1975-08-14 1975-08-14 Frequency synthesizer Pending JPS5222857A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50098952A JPS5222857A (en) 1975-08-14 1975-08-14 Frequency synthesizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50098952A JPS5222857A (en) 1975-08-14 1975-08-14 Frequency synthesizer

Publications (1)

Publication Number Publication Date
JPS5222857A true JPS5222857A (en) 1977-02-21

Family

ID=14233419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50098952A Pending JPS5222857A (en) 1975-08-14 1975-08-14 Frequency synthesizer

Country Status (1)

Country Link
JP (1) JPS5222857A (en)

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