JPS52155926A - Test method for ic memory - Google Patents

Test method for ic memory

Info

Publication number
JPS52155926A
JPS52155926A JP7215376A JP7215376A JPS52155926A JP S52155926 A JPS52155926 A JP S52155926A JP 7215376 A JP7215376 A JP 7215376A JP 7215376 A JP7215376 A JP 7215376A JP S52155926 A JPS52155926 A JP S52155926A
Authority
JP
Japan
Prior art keywords
memory
test method
thru
provision
reliability
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7215376A
Other languages
Japanese (ja)
Other versions
JPS6055920B2 (en
Inventor
Takeo Uchiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP51072153A priority Critical patent/JPS6055920B2/en
Publication of JPS52155926A publication Critical patent/JPS52155926A/en
Publication of JPS6055920B2 publication Critical patent/JPS6055920B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To improve the reliability, by detecting the defective function due to the phase difference among a plural number of input terminals, thru the provision of the exclusive logical sum gate with the output of IC memory tester.
JP51072153A 1976-06-21 1976-06-21 IC memory test method Expired JPS6055920B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51072153A JPS6055920B2 (en) 1976-06-21 1976-06-21 IC memory test method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51072153A JPS6055920B2 (en) 1976-06-21 1976-06-21 IC memory test method

Publications (2)

Publication Number Publication Date
JPS52155926A true JPS52155926A (en) 1977-12-24
JPS6055920B2 JPS6055920B2 (en) 1985-12-07

Family

ID=13481017

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51072153A Expired JPS6055920B2 (en) 1976-06-21 1976-06-21 IC memory test method

Country Status (1)

Country Link
JP (1) JPS6055920B2 (en)

Also Published As

Publication number Publication date
JPS6055920B2 (en) 1985-12-07

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