JPS52132704A - Loop duplex totally switching method - Google Patents

Loop duplex totally switching method

Info

Publication number
JPS52132704A
JPS52132704A JP4859776A JP4859776A JPS52132704A JP S52132704 A JPS52132704 A JP S52132704A JP 4859776 A JP4859776 A JP 4859776A JP 4859776 A JP4859776 A JP 4859776A JP S52132704 A JPS52132704 A JP S52132704A
Authority
JP
Japan
Prior art keywords
totally
switching method
loop duplex
duplex
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4859776A
Other languages
Japanese (ja)
Inventor
Takeshi Nakano
Toshiyuki Ide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4859776A priority Critical patent/JPS52132704A/en
Publication of JPS52132704A publication Critical patent/JPS52132704A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/437—Ring fault isolation or reconfiguration

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To realize a system suitable for the ON-line processing, by switching with the synchronism to the data transmission means on the lines thru the putting out of the changeover command from the control station.
JP4859776A 1976-04-30 1976-04-30 Loop duplex totally switching method Pending JPS52132704A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4859776A JPS52132704A (en) 1976-04-30 1976-04-30 Loop duplex totally switching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4859776A JPS52132704A (en) 1976-04-30 1976-04-30 Loop duplex totally switching method

Publications (1)

Publication Number Publication Date
JPS52132704A true JPS52132704A (en) 1977-11-07

Family

ID=12807806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4859776A Pending JPS52132704A (en) 1976-04-30 1976-04-30 Loop duplex totally switching method

Country Status (1)

Country Link
JP (1) JPS52132704A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5445502A (en) * 1977-09-17 1979-04-10 Fujitsu Ltd Data delivery system of loop system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5022505A (en) * 1973-05-30 1975-03-11
JPS5177017A (en) * 1974-12-27 1976-07-03 Fujitsu Ltd DEETADENSOROKIRIKAE HOSHIKI

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5022505A (en) * 1973-05-30 1975-03-11
JPS5177017A (en) * 1974-12-27 1976-07-03 Fujitsu Ltd DEETADENSOROKIRIKAE HOSHIKI

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5445502A (en) * 1977-09-17 1979-04-10 Fujitsu Ltd Data delivery system of loop system
JPS5746699B2 (en) * 1977-09-17 1982-10-05

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