JPS5198966A - - Google Patents

Info

Publication number
JPS5198966A
JPS5198966A JP50022925A JP2292575A JPS5198966A JP S5198966 A JPS5198966 A JP S5198966A JP 50022925 A JP50022925 A JP 50022925A JP 2292575 A JP2292575 A JP 2292575A JP S5198966 A JPS5198966 A JP S5198966A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50022925A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP50022925A priority Critical patent/JPS5198966A/ja
Publication of JPS5198966A publication Critical patent/JPS5198966A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP50022925A 1975-02-26 1975-02-26 Pending JPS5198966A (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50022925A JPS5198966A (enExample) 1975-02-26 1975-02-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50022925A JPS5198966A (enExample) 1975-02-26 1975-02-26

Publications (1)

Publication Number Publication Date
JPS5198966A true JPS5198966A (enExample) 1976-08-31

Family

ID=12096204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50022925A Pending JPS5198966A (enExample) 1975-02-26 1975-02-26

Country Status (1)

Country Link
JP (1) JPS5198966A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129648U (ja) * 1982-02-25 1983-09-02 日本電気ホームエレクトロニクス株式会社 電子部品のリ−ド曲げ切断装置
JPS61179756U (enExample) * 1985-04-30 1986-11-10
JPH03198352A (ja) * 1989-12-26 1991-08-29 Yamada Seisakusho:Kk リードフレームのモールド・フォーミング方法及びモールド・フォーミング装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129648U (ja) * 1982-02-25 1983-09-02 日本電気ホームエレクトロニクス株式会社 電子部品のリ−ド曲げ切断装置
JPS61179756U (enExample) * 1985-04-30 1986-11-10
JPH03198352A (ja) * 1989-12-26 1991-08-29 Yamada Seisakusho:Kk リードフレームのモールド・フォーミング方法及びモールド・フォーミング装置

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