JPS5173973U - - Google Patents

Info

Publication number
JPS5173973U
JPS5173973U JP14785474U JP14785474U JPS5173973U JP S5173973 U JPS5173973 U JP S5173973U JP 14785474 U JP14785474 U JP 14785474U JP 14785474 U JP14785474 U JP 14785474U JP S5173973 U JPS5173973 U JP S5173973U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14785474U
Other languages
Japanese (ja)
Other versions
JPS5531822Y2 (enrdf_load_stackoverflow
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1974147854U priority Critical patent/JPS5531822Y2/ja
Publication of JPS5173973U publication Critical patent/JPS5173973U/ja
Application granted granted Critical
Publication of JPS5531822Y2 publication Critical patent/JPS5531822Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1974147854U 1974-12-05 1974-12-05 Expired JPS5531822Y2 (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1974147854U JPS5531822Y2 (enrdf_load_stackoverflow) 1974-12-05 1974-12-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1974147854U JPS5531822Y2 (enrdf_load_stackoverflow) 1974-12-05 1974-12-05

Publications (2)

Publication Number Publication Date
JPS5173973U true JPS5173973U (enrdf_load_stackoverflow) 1976-06-10
JPS5531822Y2 JPS5531822Y2 (enrdf_load_stackoverflow) 1980-07-29

Family

ID=28438961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1974147854U Expired JPS5531822Y2 (enrdf_load_stackoverflow) 1974-12-05 1974-12-05

Country Status (1)

Country Link
JP (1) JPS5531822Y2 (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5283662U (enrdf_load_stackoverflow) * 1975-12-18 1977-06-22
JPS6098652A (ja) * 1983-11-02 1985-06-01 Mitsubishi Electric Corp 半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4913109A (enrdf_load_stackoverflow) * 1972-06-02 1974-02-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4913109A (enrdf_load_stackoverflow) * 1972-06-02 1974-02-05

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5283662U (enrdf_load_stackoverflow) * 1975-12-18 1977-06-22
JPS6098652A (ja) * 1983-11-02 1985-06-01 Mitsubishi Electric Corp 半導体装置

Also Published As

Publication number Publication date
JPS5531822Y2 (enrdf_load_stackoverflow) 1980-07-29

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