JPS5161231A - - Google Patents
Info
- Publication number
- JPS5161231A JPS5161231A JP50115695A JP11569575A JPS5161231A JP S5161231 A JPS5161231 A JP S5161231A JP 50115695 A JP50115695 A JP 50115695A JP 11569575 A JP11569575 A JP 11569575A JP S5161231 A JPS5161231 A JP S5161231A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1069—I/O lines read out arrangements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/02—Shaping pulses by amplifying
- H03K5/023—Shaping pulses by amplifying using field effect transistors
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/510,981 US3950709A (en) | 1974-10-01 | 1974-10-01 | Amplifier for random access computer memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5161231A true JPS5161231A (https=) | 1976-05-27 |
Family
ID=24032986
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50115695A Pending JPS5161231A (https=) | 1974-10-01 | 1975-09-26 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US3950709A (https=) |
| JP (1) | JPS5161231A (https=) |
| DE (1) | DE2542750A1 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4242738A (en) * | 1979-10-01 | 1980-12-30 | Rca Corporation | Look ahead high speed circuitry |
| US4309630A (en) * | 1979-12-10 | 1982-01-05 | Bell Telephone Laboratories, Incorporated | Buffer circuitry |
| JPS5783930A (en) * | 1980-11-12 | 1982-05-26 | Fujitsu Ltd | Buffer circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3644904A (en) * | 1969-11-12 | 1972-02-22 | Gen Instrument Corp | Chip select circuit for multichip random access memory |
| US3789312A (en) * | 1972-04-03 | 1974-01-29 | Ibm | Threshold independent linear amplifier |
| US3838404A (en) * | 1973-05-17 | 1974-09-24 | Teletype Corp | Random access memory system and cell |
-
1974
- 1974-10-01 US US05/510,981 patent/US3950709A/en not_active Expired - Lifetime
-
1975
- 1975-09-25 DE DE19752542750 patent/DE2542750A1/de not_active Withdrawn
- 1975-09-26 JP JP50115695A patent/JPS5161231A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE2542750A1 (de) | 1976-04-15 |
| US3950709A (en) | 1976-04-13 |