JPS5144871A - - Google Patents

Info

Publication number
JPS5144871A
JPS5144871A JP49119025A JP11902574A JPS5144871A JP S5144871 A JPS5144871 A JP S5144871A JP 49119025 A JP49119025 A JP 49119025A JP 11902574 A JP11902574 A JP 11902574A JP S5144871 A JPS5144871 A JP S5144871A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP49119025A
Other languages
Japanese (ja)
Other versions
JPS5811736B2 (ja
Inventor
Eiji Hagimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP49119025A priority Critical patent/JPS5811736B2/ja
Publication of JPS5144871A publication Critical patent/JPS5144871A/ja
Publication of JPS5811736B2 publication Critical patent/JPS5811736B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
JP49119025A 1974-10-15 1974-10-15 ハンドウタイソウチ Expired JPS5811736B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49119025A JPS5811736B2 (ja) 1974-10-15 1974-10-15 ハンドウタイソウチ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49119025A JPS5811736B2 (ja) 1974-10-15 1974-10-15 ハンドウタイソウチ

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP57070139A Division JPS606090B2 (ja) 1982-04-26 1982-04-26 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5144871A true JPS5144871A (cs) 1976-04-16
JPS5811736B2 JPS5811736B2 (ja) 1983-03-04

Family

ID=14751110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49119025A Expired JPS5811736B2 (ja) 1974-10-15 1974-10-15 ハンドウタイソウチ

Country Status (1)

Country Link
JP (1) JPS5811736B2 (cs)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5776848A (en) * 1980-10-30 1982-05-14 Seiko Epson Corp Mounting method for integrated circuit chip
JPS57184225A (en) * 1982-04-26 1982-11-12 Nec Corp Semiconductor device
JPS59141292A (ja) * 1983-02-01 1984-08-13 イビデン株式会社 プリント配線用積層板の製造方法
US4520041A (en) * 1982-11-04 1985-05-28 Tokyo Shibaura Denki Kabushiki Kaisha Method for forming metallization structure having flat surface on semiconductor substrate
US4528216A (en) * 1983-02-24 1985-07-09 Oki Electric Industry Co., Ltd. Process for forming heat-resistant resin films of polyimide and organosilicic reactants
US7651436B2 (en) 2004-06-22 2010-01-26 Nobuyoshi Sugitani Gear mechanism, planetary gear device, rotating bearing device, and magical planetary gear speed reducer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918590U (cs) * 1972-05-19 1974-02-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918590U (cs) * 1972-05-19 1974-02-16

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5776848A (en) * 1980-10-30 1982-05-14 Seiko Epson Corp Mounting method for integrated circuit chip
JPS57184225A (en) * 1982-04-26 1982-11-12 Nec Corp Semiconductor device
US4520041A (en) * 1982-11-04 1985-05-28 Tokyo Shibaura Denki Kabushiki Kaisha Method for forming metallization structure having flat surface on semiconductor substrate
JPS59141292A (ja) * 1983-02-01 1984-08-13 イビデン株式会社 プリント配線用積層板の製造方法
US4528216A (en) * 1983-02-24 1985-07-09 Oki Electric Industry Co., Ltd. Process for forming heat-resistant resin films of polyimide and organosilicic reactants
US7651436B2 (en) 2004-06-22 2010-01-26 Nobuyoshi Sugitani Gear mechanism, planetary gear device, rotating bearing device, and magical planetary gear speed reducer

Also Published As

Publication number Publication date
JPS5811736B2 (ja) 1983-03-04

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