JPS513474B1 - - Google Patents
Info
- Publication number
- JPS513474B1 JPS513474B1 JP45054751A JP5475170A JPS513474B1 JP S513474 B1 JPS513474 B1 JP S513474B1 JP 45054751 A JP45054751 A JP 45054751A JP 5475170 A JP5475170 A JP 5475170A JP S513474 B1 JPS513474 B1 JP S513474B1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/60—Wet etching
- H10P50/64—Wet etching of semiconductor materials
- H10P50/642—Chemical etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/019—Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/026—Deposition thru hole in mask
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
Landscapes
- Weting (AREA)
- ing And Chemical Polishing (AREA)
- Element Separation (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP45054751A JPS513474B1 (OSRAM) | 1970-06-25 | 1970-06-25 | |
| US00155193A US3749619A (en) | 1970-06-25 | 1971-06-21 | Method for manufacturing a semiconductor integrated circuit isolated by dielectric material |
| GB2962771A GB1304643A (OSRAM) | 1970-06-25 | 1971-06-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP45054751A JPS513474B1 (OSRAM) | 1970-06-25 | 1970-06-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS513474B1 true JPS513474B1 (OSRAM) | 1976-02-03 |
Family
ID=12979460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP45054751A Pending JPS513474B1 (OSRAM) | 1970-06-25 | 1970-06-25 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US3749619A (OSRAM) |
| JP (1) | JPS513474B1 (OSRAM) |
| GB (1) | GB1304643A (OSRAM) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2359511C2 (de) * | 1973-11-29 | 1987-03-05 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum lokalisierten Ätzen von Gräben in Siliciumkristallen |
| US4173674A (en) * | 1975-05-12 | 1979-11-06 | Hitachi, Ltd. | Dielectric insulator separated substrate for semiconductor integrated circuits |
| US4681657A (en) * | 1985-10-31 | 1987-07-21 | International Business Machines Corporation | Preferential chemical etch for doped silicon |
| EP3012621A1 (de) * | 2014-10-22 | 2016-04-27 | Bundesrepublik Deutschland, vertreten durch das Bundesministerium für Wirtschaft und Technologie, dieses vertreten durch den Präsidenten der | Verfahren zur Herstellung eines Bauteils |
-
1970
- 1970-06-25 JP JP45054751A patent/JPS513474B1/ja active Pending
-
1971
- 1971-06-21 US US00155193A patent/US3749619A/en not_active Expired - Lifetime
- 1971-06-24 GB GB2962771A patent/GB1304643A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| US3749619A (en) | 1973-07-31 |
| GB1304643A (OSRAM) | 1973-01-24 |