JPS5127104B1 - - Google Patents
Info
- Publication number
- JPS5127104B1 JPS5127104B1 JP46030899A JP3089971A JPS5127104B1 JP S5127104 B1 JPS5127104 B1 JP S5127104B1 JP 46030899 A JP46030899 A JP 46030899A JP 3089971 A JP3089971 A JP 3089971A JP S5127104 B1 JPS5127104 B1 JP S5127104B1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Pulse Circuits (AREA)
- Logic Circuits (AREA)
- Shift Register Type Memory (AREA)
- Reverberation, Karaoke And Other Acoustics (AREA)
- Networks Using Active Elements (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7017392A FR2087271A5 (enExample) | 1970-05-13 | 1970-05-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5127104B1 true JPS5127104B1 (enExample) | 1976-08-10 |
Family
ID=9055443
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP46030899A Pending JPS5127104B1 (enExample) | 1970-05-13 | 1971-05-11 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3676709A (enExample) |
| JP (1) | JPS5127104B1 (enExample) |
| FR (1) | FR2087271A5 (enExample) |
| GB (1) | GB1283665A (enExample) |
| SE (1) | SE366884B (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA979080A (en) * | 1972-08-30 | 1975-12-02 | Tokyo Shibaura Electric Co. | Logic circuit arrangement using insulated gate field effect transistors |
| US3825771A (en) * | 1972-12-04 | 1974-07-23 | Bell Telephone Labor Inc | Igfet inverter circuit |
| US3857045A (en) * | 1973-04-17 | 1974-12-24 | Nasa | Four-phase logic systems |
| JPS52158A (en) * | 1975-06-23 | 1977-01-05 | Hitachi Ltd | Ratioless circuit |
| US4565934A (en) * | 1982-03-01 | 1986-01-21 | Texas Instruments Incorporated | Dynamic clocking system using six clocks to achieve six delays |
| US4890308A (en) * | 1987-09-19 | 1989-12-26 | Olympus Optical Co., Ltd. | Scanning pulse generating circuit |
| DE4307177C2 (de) * | 1993-03-08 | 1996-02-08 | Lueder Ernst | Schaltungsanordnung als Teil eines Schieberegisters zur Ansteuerung von ketten- oder matrixförmig angeordneten Schaltelementen |
-
1970
- 1970-05-13 FR FR7017392A patent/FR2087271A5/fr not_active Expired
-
1971
- 1971-05-10 SE SE06007/71A patent/SE366884B/xx unknown
- 1971-05-10 US US141494A patent/US3676709A/en not_active Expired - Lifetime
- 1971-05-11 GB GB04142/71A patent/GB1283665A/en not_active Expired
- 1971-05-11 JP JP46030899A patent/JPS5127104B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE2122878A1 (de) | 1971-12-02 |
| SE366884B (enExample) | 1974-05-06 |
| GB1283665A (en) | 1972-08-02 |
| DE2122878B2 (de) | 1976-07-22 |
| FR2087271A5 (enExample) | 1971-12-31 |
| US3676709A (en) | 1972-07-11 |