JPS51149729A - System for supplying power to semiconductor memory - Google Patents

System for supplying power to semiconductor memory

Info

Publication number
JPS51149729A
JPS51149729A JP50073173A JP7317375A JPS51149729A JP S51149729 A JPS51149729 A JP S51149729A JP 50073173 A JP50073173 A JP 50073173A JP 7317375 A JP7317375 A JP 7317375A JP S51149729 A JPS51149729 A JP S51149729A
Authority
JP
Japan
Prior art keywords
semiconductor memory
supplying power
memory
substrate
destruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50073173A
Other languages
Japanese (ja)
Inventor
Sadao Oba
Atsuhiko Tsujimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP50073173A priority Critical patent/JPS51149729A/en
Publication of JPS51149729A publication Critical patent/JPS51149729A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To prevent the destruction of the memory by inserting a circuit which maintains the substrate at a negative voltage when the substrate bias voltage of an IC memory becomes 0.
JP50073173A 1975-06-18 1975-06-18 System for supplying power to semiconductor memory Pending JPS51149729A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50073173A JPS51149729A (en) 1975-06-18 1975-06-18 System for supplying power to semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50073173A JPS51149729A (en) 1975-06-18 1975-06-18 System for supplying power to semiconductor memory

Publications (1)

Publication Number Publication Date
JPS51149729A true JPS51149729A (en) 1976-12-22

Family

ID=13510476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50073173A Pending JPS51149729A (en) 1975-06-18 1975-06-18 System for supplying power to semiconductor memory

Country Status (1)

Country Link
JP (1) JPS51149729A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54148491A (en) * 1978-05-15 1979-11-20 Nec Corp Semiconductor integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54148491A (en) * 1978-05-15 1979-11-20 Nec Corp Semiconductor integrated circuit

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