JPS51141544A - Method of memory utilization control - Google Patents
Method of memory utilization controlInfo
- Publication number
- JPS51141544A JPS51141544A JP50065539A JP6553975A JPS51141544A JP S51141544 A JPS51141544 A JP S51141544A JP 50065539 A JP50065539 A JP 50065539A JP 6553975 A JP6553975 A JP 6553975A JP S51141544 A JPS51141544 A JP S51141544A
- Authority
- JP
- Japan
- Prior art keywords
- memory utilization
- utilization control
- memory
- control
- common use
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Multi Processors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50065539A JPS51141544A (en) | 1975-05-31 | 1975-05-31 | Method of memory utilization control |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50065539A JPS51141544A (en) | 1975-05-31 | 1975-05-31 | Method of memory utilization control |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54126550A Division JPS5833968B2 (ja) | 1979-10-01 | 1979-10-01 | メモリ利用管理方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS51141544A true JPS51141544A (en) | 1976-12-06 |
JPS5736613B2 JPS5736613B2 (ru) | 1982-08-05 |
Family
ID=13289909
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50065539A Granted JPS51141544A (en) | 1975-05-31 | 1975-05-31 | Method of memory utilization control |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS51141544A (ru) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63106846A (ja) * | 1986-10-24 | 1988-05-11 | Ando Electric Co Ltd | 複数の入力信号の取出し順序指定回路 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5055243A (ru) * | 1973-09-12 | 1975-05-15 | ||
JPS5233456U (ru) * | 1975-08-29 | 1977-03-09 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5233456B2 (ru) * | 1975-01-30 | 1977-08-29 |
-
1975
- 1975-05-31 JP JP50065539A patent/JPS51141544A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5055243A (ru) * | 1973-09-12 | 1975-05-15 | ||
JPS5233456U (ru) * | 1975-08-29 | 1977-03-09 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63106846A (ja) * | 1986-10-24 | 1988-05-11 | Ando Electric Co Ltd | 複数の入力信号の取出し順序指定回路 |
Also Published As
Publication number | Publication date |
---|---|
JPS5736613B2 (ru) | 1982-08-05 |
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