JPS51137335A - Faulty memory permissible control system - Google Patents
Faulty memory permissible control systemInfo
- Publication number
- JPS51137335A JPS51137335A JP50061515A JP6151575A JPS51137335A JP S51137335 A JPS51137335 A JP S51137335A JP 50061515 A JP50061515 A JP 50061515A JP 6151575 A JP6151575 A JP 6151575A JP S51137335 A JPS51137335 A JP S51137335A
- Authority
- JP
- Japan
- Prior art keywords
- control system
- faulty memory
- permissible control
- permissible
- faulty
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: A memory system which can deal with a permanent error or a temporary error by detecting them.
COPYRIGHT: (C)1976,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50061515A JPS51137335A (en) | 1975-05-22 | 1975-05-22 | Faulty memory permissible control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50061515A JPS51137335A (en) | 1975-05-22 | 1975-05-22 | Faulty memory permissible control system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS51137335A true JPS51137335A (en) | 1976-11-27 |
JPS5615080B2 JPS5615080B2 (en) | 1981-04-08 |
Family
ID=13173285
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50061515A Granted JPS51137335A (en) | 1975-05-22 | 1975-05-22 | Faulty memory permissible control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS51137335A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1981000481A1 (en) * | 1979-07-30 | 1981-02-19 | Fujitsu Ltd | Information processing system for error processing,and error processing method |
WO1981000641A1 (en) * | 1979-08-31 | 1981-03-05 | Fujitsu Ltd | Error correction system |
JPH02206843A (en) * | 1989-01-27 | 1990-08-16 | Digital Equip Corp <Dec> | Defective data algorithm |
JP2014120196A (en) * | 2012-12-12 | 2014-06-30 | Hgst Netherlands B V | Technique for storing bit in memory cell having stuck failure |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0321009Y2 (en) * | 1986-09-09 | 1991-05-08 |
-
1975
- 1975-05-22 JP JP50061515A patent/JPS51137335A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1981000481A1 (en) * | 1979-07-30 | 1981-02-19 | Fujitsu Ltd | Information processing system for error processing,and error processing method |
WO1981000641A1 (en) * | 1979-08-31 | 1981-03-05 | Fujitsu Ltd | Error correction system |
JPH02206843A (en) * | 1989-01-27 | 1990-08-16 | Digital Equip Corp <Dec> | Defective data algorithm |
JP2014120196A (en) * | 2012-12-12 | 2014-06-30 | Hgst Netherlands B V | Technique for storing bit in memory cell having stuck failure |
Also Published As
Publication number | Publication date |
---|---|
JPS5615080B2 (en) | 1981-04-08 |
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