JPS51137305A - Error correcting system - Google Patents

Error correcting system

Info

Publication number
JPS51137305A
JPS51137305A JP50060218A JP6021875A JPS51137305A JP S51137305 A JPS51137305 A JP S51137305A JP 50060218 A JP50060218 A JP 50060218A JP 6021875 A JP6021875 A JP 6021875A JP S51137305 A JPS51137305 A JP S51137305A
Authority
JP
Japan
Prior art keywords
error correcting
correcting system
error
stopping
desired level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50060218A
Other languages
Japanese (ja)
Other versions
JPS5524824B2 (en
Inventor
Meiki Yahata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP50060218A priority Critical patent/JPS51137305A/en
Publication of JPS51137305A publication Critical patent/JPS51137305A/en
Publication of JPS5524824B2 publication Critical patent/JPS5524824B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/497Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems by correlative coding, e.g. partial response coding or echo modulation coding transmitters and receivers for partial response systems

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Correction Of Errors (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To decrease misoperation by means of stopping the error correction until the error arrives at a desired level.
JP50060218A 1975-05-22 1975-05-22 Error correcting system Granted JPS51137305A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50060218A JPS51137305A (en) 1975-05-22 1975-05-22 Error correcting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50060218A JPS51137305A (en) 1975-05-22 1975-05-22 Error correcting system

Publications (2)

Publication Number Publication Date
JPS51137305A true JPS51137305A (en) 1976-11-27
JPS5524824B2 JPS5524824B2 (en) 1980-07-01

Family

ID=13135793

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50060218A Granted JPS51137305A (en) 1975-05-22 1975-05-22 Error correcting system

Country Status (1)

Country Link
JP (1) JPS51137305A (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021533736A (en) 2018-08-16 2021-12-09 テルモ株式会社 Cell culture substrate
WO2020036205A1 (en) 2018-08-16 2020-02-20 Terumo Kabushiki Kaisha Cell culture substrate
JP7315653B2 (en) 2018-08-16 2023-07-26 テルモ株式会社 Cell culture substrate
WO2020036204A1 (en) 2018-08-16 2020-02-20 Terumo Kabushiki Kaisha Cell culture substrate
EP3887497A1 (en) 2018-12-20 2021-10-06 TERUMO Kabushiki Kaisha Cell culture substrate
JP7348281B2 (en) 2018-12-20 2023-09-20 テルモ株式会社 Cell culture substrate
WO2021054262A1 (en) 2019-09-20 2021-03-25 Terumo Kabushiki Kaisha Method for evaluating a coating state of either an adsorbent of a sample protein or an adsorption state of a sample protein
JP2023072702A (en) 2020-06-18 2023-05-25 テルモ株式会社 Cell culture substrate

Also Published As

Publication number Publication date
JPS5524824B2 (en) 1980-07-01

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