JPS51134042A - Method of controlling instruction sequence of data processor memory programming - Google Patents

Method of controlling instruction sequence of data processor memory programming

Info

Publication number
JPS51134042A
JPS51134042A JP51049362A JP4936276A JPS51134042A JP S51134042 A JPS51134042 A JP S51134042A JP 51049362 A JP51049362 A JP 51049362A JP 4936276 A JP4936276 A JP 4936276A JP S51134042 A JPS51134042 A JP S51134042A
Authority
JP
Japan
Prior art keywords
data processor
instruction sequence
processor memory
memory programming
controlling instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP51049362A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5543135B2 (enExample
Inventor
Purai Geruharuto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19752519395 external-priority patent/DE2519395C3/de
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of JPS51134042A publication Critical patent/JPS51134042A/ja
Publication of JPS5543135B2 publication Critical patent/JPS5543135B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
JP51049362A 1975-04-30 1976-04-28 Method of controlling instruction sequence of data processor memory programming Granted JPS51134042A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19752519395 DE2519395C3 (de) 1975-04-30 Anordnung zur Steuerung der Befehlsfolge in Datenverarbeitungseinrichtungen mit Speicherprogrammierung

Publications (2)

Publication Number Publication Date
JPS51134042A true JPS51134042A (en) 1976-11-20
JPS5543135B2 JPS5543135B2 (enExample) 1980-11-05

Family

ID=5945496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51049362A Granted JPS51134042A (en) 1975-04-30 1976-04-28 Method of controlling instruction sequence of data processor memory programming

Country Status (7)

Country Link
JP (1) JPS51134042A (enExample)
BE (1) BE841348A (enExample)
CH (1) CH608640A5 (enExample)
FR (1) FR2309926A1 (enExample)
GB (1) GB1537764A (enExample)
IT (1) IT1060562B (enExample)
NL (1) NL7603976A (enExample)

Also Published As

Publication number Publication date
DE2519395B2 (de) 1977-02-24
NL7603976A (nl) 1976-11-02
GB1537764A (en) 1979-01-04
JPS5543135B2 (enExample) 1980-11-05
AU1270176A (en) 1977-10-13
FR2309926B1 (enExample) 1979-07-13
FR2309926A1 (fr) 1976-11-26
CH608640A5 (en) 1979-01-15
DE2519395A1 (de) 1976-11-04
BE841348A (fr) 1976-11-03
IT1060562B (it) 1982-08-20

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