JPS51126018A - Mnos control circuit - Google Patents

Mnos control circuit

Info

Publication number
JPS51126018A
JPS51126018A JP5054975A JP5054975A JPS51126018A JP S51126018 A JPS51126018 A JP S51126018A JP 5054975 A JP5054975 A JP 5054975A JP 5054975 A JP5054975 A JP 5054975A JP S51126018 A JPS51126018 A JP S51126018A
Authority
JP
Japan
Prior art keywords
mnos
control circuit
circuit
control
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5054975A
Other languages
Japanese (ja)
Other versions
JPS566076B2 (en
Inventor
Kazumi Kawashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5054975A priority Critical patent/JPS51126018A/en
Publication of JPS51126018A publication Critical patent/JPS51126018A/en
Publication of JPS566076B2 publication Critical patent/JPS566076B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To made a simple circuit, constructing as to be able to control by circuit 1 switch the MNOS element read in and read out.
JP5054975A 1975-04-24 1975-04-24 Mnos control circuit Granted JPS51126018A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5054975A JPS51126018A (en) 1975-04-24 1975-04-24 Mnos control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5054975A JPS51126018A (en) 1975-04-24 1975-04-24 Mnos control circuit

Publications (2)

Publication Number Publication Date
JPS51126018A true JPS51126018A (en) 1976-11-02
JPS566076B2 JPS566076B2 (en) 1981-02-09

Family

ID=12862086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5054975A Granted JPS51126018A (en) 1975-04-24 1975-04-24 Mnos control circuit

Country Status (1)

Country Link
JP (1) JPS51126018A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57191876A (en) * 1981-05-20 1982-11-25 Sony Corp Driving device of linear tracking arm

Also Published As

Publication number Publication date
JPS566076B2 (en) 1981-02-09

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