JPS5098671U - - Google Patents
Info
- Publication number
- JPS5098671U JPS5098671U JP1974006439U JP643974U JPS5098671U JP S5098671 U JPS5098671 U JP S5098671U JP 1974006439 U JP1974006439 U JP 1974006439U JP 643974 U JP643974 U JP 643974U JP S5098671 U JPS5098671 U JP S5098671U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1974006439U JPS5623888Y2 (https=) | 1974-01-10 | 1974-01-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1974006439U JPS5623888Y2 (https=) | 1974-01-10 | 1974-01-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5098671U true JPS5098671U (https=) | 1975-08-16 |
| JPS5623888Y2 JPS5623888Y2 (https=) | 1981-06-04 |
Family
ID=28070877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1974006439U Expired JPS5623888Y2 (https=) | 1974-01-10 | 1974-01-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5623888Y2 (https=) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3483308A (en) * | 1968-10-24 | 1969-12-09 | Texas Instruments Inc | Modular packages for semiconductor devices |
| JPS4823962U (https=) * | 1971-07-28 | 1973-03-19 |
-
1974
- 1974-01-10 JP JP1974006439U patent/JPS5623888Y2/ja not_active Expired
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3483308A (en) * | 1968-10-24 | 1969-12-09 | Texas Instruments Inc | Modular packages for semiconductor devices |
| JPS4823962U (https=) * | 1971-07-28 | 1973-03-19 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5623888Y2 (https=) | 1981-06-04 |