JPS5098274A - - Google Patents

Info

Publication number
JPS5098274A
JPS5098274A JP48144120A JP14412073A JPS5098274A JP S5098274 A JPS5098274 A JP S5098274A JP 48144120 A JP48144120 A JP 48144120A JP 14412073 A JP14412073 A JP 14412073A JP S5098274 A JPS5098274 A JP S5098274A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP48144120A
Other languages
Japanese (ja)
Other versions
JPS5225297B2 (enExample
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP48144120A priority Critical patent/JPS5225297B2/ja
Publication of JPS5098274A publication Critical patent/JPS5098274A/ja
Publication of JPS5225297B2 publication Critical patent/JPS5225297B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP48144120A 1973-12-26 1973-12-26 Expired JPS5225297B2 (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP48144120A JPS5225297B2 (enExample) 1973-12-26 1973-12-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP48144120A JPS5225297B2 (enExample) 1973-12-26 1973-12-26

Publications (2)

Publication Number Publication Date
JPS5098274A true JPS5098274A (enExample) 1975-08-05
JPS5225297B2 JPS5225297B2 (enExample) 1977-07-06

Family

ID=15354643

Family Applications (1)

Application Number Title Priority Date Filing Date
JP48144120A Expired JPS5225297B2 (enExample) 1973-12-26 1973-12-26

Country Status (1)

Country Link
JP (1) JPS5225297B2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6163843U (enExample) * 1984-09-28 1986-04-30
US5841190A (en) * 1995-05-19 1998-11-24 Ibiden Co., Ltd. High density multi-layered printed wiring board, multi-chip carrier and semiconductor package

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5557911U (enExample) * 1978-10-16 1980-04-19

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6163843U (enExample) * 1984-09-28 1986-04-30
US5841190A (en) * 1995-05-19 1998-11-24 Ibiden Co., Ltd. High density multi-layered printed wiring board, multi-chip carrier and semiconductor package
WO2004100260A1 (ja) * 1995-05-19 2004-11-18 Kouta Noda 高密度多層プリント配線版、マルチチップキャリア及び半導体パッケージ

Also Published As

Publication number Publication date
JPS5225297B2 (enExample) 1977-07-06

Similar Documents

Publication Publication Date Title
AR201758A1 (enExample)
AU476761B2 (enExample)
AU465372B2 (enExample)
AU474593B2 (enExample)
AU474511B2 (enExample)
AU474838B2 (enExample)
AU471343B2 (enExample)
AU465453B2 (enExample)
AU465434B2 (enExample)
AU450229B2 (enExample)
AU476714B2 (enExample)
AU466283B2 (enExample)
AU476696B2 (enExample)
AU472848B2 (enExample)
JPS5098274A (enExample)
AU477823B2 (enExample)
AR210729A1 (enExample)
AU461342B2 (enExample)
AU447540B2 (enExample)
AR197627A1 (enExample)
AR196382A1 (enExample)
AU471461B2 (enExample)
AU476873B1 (enExample)
AU477824B2 (enExample)
AU1891376A (enExample)