JPS5091277A - - Google Patents

Info

Publication number
JPS5091277A
JPS5091277A JP48137799A JP13779973A JPS5091277A JP S5091277 A JPS5091277 A JP S5091277A JP 48137799 A JP48137799 A JP 48137799A JP 13779973 A JP13779973 A JP 13779973A JP S5091277 A JPS5091277 A JP S5091277A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP48137799A
Other languages
Japanese (ja)
Other versions
JPS5242668B2 (enExample
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP48137799A priority Critical patent/JPS5242668B2/ja
Publication of JPS5091277A publication Critical patent/JPS5091277A/ja
Publication of JPS5242668B2 publication Critical patent/JPS5242668B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Wire Bonding (AREA)
JP48137799A 1973-12-12 1973-12-12 Expired JPS5242668B2 (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP48137799A JPS5242668B2 (enExample) 1973-12-12 1973-12-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP48137799A JPS5242668B2 (enExample) 1973-12-12 1973-12-12

Publications (2)

Publication Number Publication Date
JPS5091277A true JPS5091277A (enExample) 1975-07-21
JPS5242668B2 JPS5242668B2 (enExample) 1977-10-26

Family

ID=15207107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP48137799A Expired JPS5242668B2 (enExample) 1973-12-12 1973-12-12

Country Status (1)

Country Link
JP (1) JPS5242668B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5258953U (enExample) * 1975-10-27 1977-04-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5258953U (enExample) * 1975-10-27 1977-04-28

Also Published As

Publication number Publication date
JPS5242668B2 (enExample) 1977-10-26

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