JPS5072172U - - Google Patents

Info

Publication number
JPS5072172U
JPS5072172U JP12649973U JP12649973U JPS5072172U JP S5072172 U JPS5072172 U JP S5072172U JP 12649973 U JP12649973 U JP 12649973U JP 12649973 U JP12649973 U JP 12649973U JP S5072172 U JPS5072172 U JP S5072172U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12649973U
Other versions
JPS5511146Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1973126499U priority Critical patent/JPS5511146Y2/ja
Publication of JPS5072172U publication Critical patent/JPS5072172U/ja
Application granted granted Critical
Publication of JPS5511146Y2 publication Critical patent/JPS5511146Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)
JP1973126499U 1973-11-02 1973-11-02 Expired JPS5511146Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1973126499U JPS5511146Y2 (ja) 1973-11-02 1973-11-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1973126499U JPS5511146Y2 (ja) 1973-11-02 1973-11-02

Publications (2)

Publication Number Publication Date
JPS5072172U true JPS5072172U (ja) 1975-06-25
JPS5511146Y2 JPS5511146Y2 (ja) 1980-03-11

Family

ID=28378860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1973126499U Expired JPS5511146Y2 (ja) 1973-11-02 1973-11-02

Country Status (1)

Country Link
JP (1) JPS5511146Y2 (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5226988A (en) * 1975-08-21 1977-02-28 Pitney Bowes Inc Method and equipment for seperating and unfolding flap from enverope

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5226988A (en) * 1975-08-21 1977-02-28 Pitney Bowes Inc Method and equipment for seperating and unfolding flap from enverope

Also Published As

Publication number Publication date
JPS5511146Y2 (ja) 1980-03-11

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