JPS5039852A - - Google Patents

Info

Publication number
JPS5039852A
JPS5039852A JP9068473A JP9068473A JPS5039852A JP S5039852 A JPS5039852 A JP S5039852A JP 9068473 A JP9068473 A JP 9068473A JP 9068473 A JP9068473 A JP 9068473A JP S5039852 A JPS5039852 A JP S5039852A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9068473A
Other versions
JPS5330478B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9068473A priority Critical patent/JPS5330478B2/ja
Publication of JPS5039852A publication Critical patent/JPS5039852A/ja
Publication of JPS5330478B2 publication Critical patent/JPS5330478B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate

Landscapes

  • Bipolar Transistors (AREA)
  • Networks Using Active Elements (AREA)
JP9068473A 1973-08-13 1973-08-13 Expired JPS5330478B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9068473A JPS5330478B2 (ja) 1973-08-13 1973-08-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9068473A JPS5330478B2 (ja) 1973-08-13 1973-08-13

Publications (2)

Publication Number Publication Date
JPS5039852A true JPS5039852A (ja) 1975-04-12
JPS5330478B2 JPS5330478B2 (ja) 1978-08-26

Family

ID=14005348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9068473A Expired JPS5330478B2 (ja) 1973-08-13 1973-08-13

Country Status (1)

Country Link
JP (1) JPS5330478B2 (ja)

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
TOURNALOFSOLIDSTATECIRAUIT#N3=1969 *

Also Published As

Publication number Publication date
JPS5330478B2 (ja) 1978-08-26

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