JPS5028798A - - Google Patents

Info

Publication number
JPS5028798A
JPS5028798A JP48078366A JP7836673A JPS5028798A JP S5028798 A JPS5028798 A JP S5028798A JP 48078366 A JP48078366 A JP 48078366A JP 7836673 A JP7836673 A JP 7836673A JP S5028798 A JPS5028798 A JP S5028798A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP48078366A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP48078366A priority Critical patent/JPS5028798A/ja
Publication of JPS5028798A publication Critical patent/JPS5028798A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Led Device Packages (AREA)
JP48078366A 1973-07-13 1973-07-13 Pending JPS5028798A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP48078366A JPS5028798A (ja) 1973-07-13 1973-07-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP48078366A JPS5028798A (ja) 1973-07-13 1973-07-13

Publications (1)

Publication Number Publication Date
JPS5028798A true JPS5028798A (ja) 1975-03-24

Family

ID=13659995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP48078366A Pending JPS5028798A (ja) 1973-07-13 1973-07-13

Country Status (1)

Country Link
JP (1) JPS5028798A (ja)

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