JPS5024176B1 - - Google Patents

Info

Publication number
JPS5024176B1
JPS5024176B1 JP45115301A JP11530170A JPS5024176B1 JP S5024176 B1 JPS5024176 B1 JP S5024176B1 JP 45115301 A JP45115301 A JP 45115301A JP 11530170 A JP11530170 A JP 11530170A JP S5024176 B1 JPS5024176 B1 JP S5024176B1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP45115301A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS5024176B1 publication Critical patent/JPS5024176B1/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
JP45115301A 1969-12-31 1970-12-22 Pending JPS5024176B1 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US88960469A 1969-12-31 1969-12-31

Publications (1)

Publication Number Publication Date
JPS5024176B1 true JPS5024176B1 (ja) 1975-08-13

Family

ID=25395433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP45115301A Pending JPS5024176B1 (ja) 1969-12-31 1970-12-22

Country Status (2)

Country Link
US (1) US3618053A (ja)
JP (1) JPS5024176B1 (ja)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3699539A (en) * 1970-12-16 1972-10-17 North American Rockwell Bootstrapped inverter memory cell
US3728556A (en) * 1971-11-24 1973-04-17 United Aircraft Corp Regenerative fet converter circuitry
US3855483A (en) * 1972-02-14 1974-12-17 Intel Corp Memory system incorporating a memory cell and timing means on a single semiconductor substrate
JPS5522640Y2 (ja) * 1973-06-30 1980-05-29
JPS5312239A (en) * 1976-07-20 1978-02-03 Matsushita Electric Ind Co Ltd Driving system for memory unit
US4139785A (en) * 1977-05-31 1979-02-13 Texas Instruments Incorporated Static memory cell with inverted field effect transistor
US4352997A (en) * 1977-05-31 1982-10-05 Texas Instruments Incorporated Static MOS memory cell using inverted N-channel field-effect transistor
US4139786A (en) * 1977-05-31 1979-02-13 Texas Instruments Incorporated Static MOS memory cell using inverted N-channel field-effect transistor
US4168536A (en) * 1977-06-30 1979-09-18 International Business Machines Corporation Capacitor memory with an amplified cell signal
US4281400A (en) * 1979-12-28 1981-07-28 Rca Corporation Circuit for reducing the loading effect of an insulated-gate field-effect transistor (IGFET) on a signal source
US4308594A (en) * 1980-01-31 1981-12-29 Mostek Corporation MOS Memory cell
US4571704A (en) * 1984-02-17 1986-02-18 Hughes Aircraft Company Nonvolatile latch
JPH0713872B2 (ja) * 1987-11-24 1995-02-15 三菱電機株式会社 半導体記憶装置
GB8827130D0 (en) * 1988-11-21 1988-12-29 Krilic G Self-refreshable dynamic memory cell
US6044012A (en) * 1999-03-05 2000-03-28 Xilinx, Inc. Non-volatile memory array using gate breakdown structure in standard sub 0.35 micron CMOS process
US6522582B1 (en) 1999-03-05 2003-02-18 Xilinx, Inc. Non-volatile memory array using gate breakdown structures
US10762944B2 (en) * 2017-12-18 2020-09-01 Micron Technology, Inc. Single plate configuration and memory array operation

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3510849A (en) * 1965-08-09 1970-05-05 Nippon Electric Co Memory devices of the semiconductor type having high-speed readout means
US3483400A (en) * 1966-06-15 1969-12-09 Sharp Kk Flip-flop circuit
US3524077A (en) * 1968-02-28 1970-08-11 Rca Corp Translating information with multi-phase clock signals

Also Published As

Publication number Publication date
US3618053A (en) 1971-11-02

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