JPS5021052U - - Google Patents
Info
- Publication number
- JPS5021052U JPS5021052U JP7321873U JP7321873U JPS5021052U JP S5021052 U JPS5021052 U JP S5021052U JP 7321873 U JP7321873 U JP 7321873U JP 7321873 U JP7321873 U JP 7321873U JP S5021052 U JPS5021052 U JP S5021052U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1973073218U JPS5410508Y2 (ja) | 1973-06-19 | 1973-06-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1973073218U JPS5410508Y2 (ja) | 1973-06-19 | 1973-06-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5021052U true JPS5021052U (ja) | 1975-03-10 |
| JPS5410508Y2 JPS5410508Y2 (ja) | 1979-05-15 |
Family
ID=28244447
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1973073218U Expired JPS5410508Y2 (ja) | 1973-06-19 | 1973-06-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5410508Y2 (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55156395A (en) * | 1979-05-24 | 1980-12-05 | Fujitsu Ltd | Method of fabricating hollow multilayer printed board |
-
1973
- 1973-06-19 JP JP1973073218U patent/JPS5410508Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55156395A (en) * | 1979-05-24 | 1980-12-05 | Fujitsu Ltd | Method of fabricating hollow multilayer printed board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5410508Y2 (ja) | 1979-05-15 |