JPS50156874A - - Google Patents

Info

Publication number
JPS50156874A
JPS50156874A JP6438874A JP6438874A JPS50156874A JP S50156874 A JPS50156874 A JP S50156874A JP 6438874 A JP6438874 A JP 6438874A JP 6438874 A JP6438874 A JP 6438874A JP S50156874 A JPS50156874 A JP S50156874A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6438874A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6438874A priority Critical patent/JPS50156874A/ja
Publication of JPS50156874A publication Critical patent/JPS50156874A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
JP6438874A 1974-06-06 1974-06-06 Pending JPS50156874A (US06272168-20010807-M00014.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6438874A JPS50156874A (US06272168-20010807-M00014.png) 1974-06-06 1974-06-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6438874A JPS50156874A (US06272168-20010807-M00014.png) 1974-06-06 1974-06-06

Publications (1)

Publication Number Publication Date
JPS50156874A true JPS50156874A (US06272168-20010807-M00014.png) 1975-12-18

Family

ID=13256876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6438874A Pending JPS50156874A (US06272168-20010807-M00014.png) 1974-06-06 1974-06-06

Country Status (1)

Country Link
JP (1) JPS50156874A (US06272168-20010807-M00014.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5423563U (US06272168-20010807-M00014.png) * 1977-07-18 1979-02-16

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918591U (US06272168-20010807-M00014.png) * 1972-05-19 1974-02-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918591U (US06272168-20010807-M00014.png) * 1972-05-19 1974-02-16

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5423563U (US06272168-20010807-M00014.png) * 1977-07-18 1979-02-16
JPS5826525Y2 (ja) * 1977-07-18 1983-06-08 日本電気株式会社 半導体装置

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