JPS50107462A - - Google Patents
Info
- Publication number
- JPS50107462A JPS50107462A JP49011787A JP1178774A JPS50107462A JP S50107462 A JPS50107462 A JP S50107462A JP 49011787 A JP49011787 A JP 49011787A JP 1178774 A JP1178774 A JP 1178774A JP S50107462 A JPS50107462 A JP S50107462A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49011787A JPS50107462A (ja) | 1974-01-30 | 1974-01-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49011787A JPS50107462A (ja) | 1974-01-30 | 1974-01-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS50107462A true JPS50107462A (ja) | 1975-08-23 |
Family
ID=11787629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49011787A Pending JPS50107462A (ja) | 1974-01-30 | 1974-01-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS50107462A (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61254044A (ja) * | 1985-05-03 | 1986-11-11 | フィリップス エレクトロニクス ネムローゼ フェンノートシャップ | 回転電気機械の回転子の接続部及びその製造方法 |
-
1974
- 1974-01-30 JP JP49011787A patent/JPS50107462A/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61254044A (ja) * | 1985-05-03 | 1986-11-11 | フィリップス エレクトロニクス ネムローゼ フェンノートシャップ | 回転電気機械の回転子の接続部及びその製造方法 |