JPS499984A - - Google Patents

Info

Publication number
JPS499984A
JPS499984A JP48025959A JP2595973A JPS499984A JP S499984 A JPS499984 A JP S499984A JP 48025959 A JP48025959 A JP 48025959A JP 2595973 A JP2595973 A JP 2595973A JP S499984 A JPS499984 A JP S499984A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP48025959A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS499984A publication Critical patent/JPS499984A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/02Contacts, special
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/053Field effect transistors fets
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/106Masks, special
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/122Polycrystalline
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/141Self-alignment coat gate

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP48025959A 1972-03-31 1973-03-05 Pending JPS499984A (US08197722-20120612-C00042.png)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US23993572A 1972-03-31 1972-03-31

Publications (1)

Publication Number Publication Date
JPS499984A true JPS499984A (US08197722-20120612-C00042.png) 1974-01-29

Family

ID=22904393

Family Applications (1)

Application Number Title Priority Date Filing Date
JP48025959A Pending JPS499984A (US08197722-20120612-C00042.png) 1972-03-31 1973-03-05

Country Status (5)

Country Link
US (1) US3747200A (US08197722-20120612-C00042.png)
JP (1) JPS499984A (US08197722-20120612-C00042.png)
DE (1) DE2315761B2 (US08197722-20120612-C00042.png)
FR (1) FR2178930B1 (US08197722-20120612-C00042.png)
GB (1) GB1382936A (US08197722-20120612-C00042.png)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01128249U (US08197722-20120612-C00042.png) * 1988-02-23 1989-09-01
JPH01128248U (US08197722-20120612-C00042.png) * 1988-02-23 1989-09-01

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1357515A (en) * 1972-03-10 1974-06-26 Matsushita Electronics Corp Method for manufacturing an mos integrated circuit
US4053336A (en) * 1972-05-30 1977-10-11 Ferranti Limited Method of manufacturing a semiconductor integrated circuit device having a conductive plane and a diffused network of conductive tracks
US3863331A (en) * 1972-09-11 1975-02-04 Rca Corp Matching of semiconductor device characteristics
US3825995A (en) * 1972-10-10 1974-07-30 Gen Electric Dielectric strip isolation for jfet or mesfet depletion-mode bucket-brigade circuit
US3825996A (en) * 1972-10-10 1974-07-30 Gen Electric Gate-diffusion isolation for jfet depletion-mode bucket brigade circuit
JPS4960870A (US08197722-20120612-C00042.png) * 1972-10-16 1974-06-13
US3889287A (en) * 1973-12-06 1975-06-10 Motorola Inc Mnos memory matrix
JPS598065B2 (ja) * 1976-01-30 1984-02-22 松下電子工業株式会社 Mos集積回路の製造方法
US4013489A (en) * 1976-02-10 1977-03-22 Intel Corporation Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit
US4075509A (en) * 1976-10-12 1978-02-21 National Semiconductor Corporation Cmos comparator circuit and method of manufacture
NL185376C (nl) * 1976-10-25 1990-03-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
US4506437A (en) * 1978-05-26 1985-03-26 Rockwell International Corporation Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US4455737A (en) * 1978-05-26 1984-06-26 Rockwell International Corporation Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US4280271A (en) * 1979-10-11 1981-07-28 Texas Instruments Incorporated Three level interconnect process for manufacture of integrated circuit devices
US4319396A (en) * 1979-12-28 1982-03-16 Bell Telephone Laboratories, Incorporated Method for fabricating IGFET integrated circuits
US4317276A (en) * 1980-06-12 1982-03-02 Teletype Corporation Method of manufacturing an insulated gate field-effect transistor therefore in a silicon wafer
US4874713A (en) * 1989-05-01 1989-10-17 Ncr Corporation Method of making asymmetrically optimized CMOS field effect transistors

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1086128A (en) * 1964-10-23 1967-10-04 Motorola Inc Fabrication of four-layer switch with controlled breakdown voltage
US3475234A (en) * 1967-03-27 1969-10-28 Bell Telephone Labor Inc Method for making mis structures
US3673471A (en) * 1970-10-08 1972-06-27 Fairchild Camera Instr Co Doped semiconductor electrodes for mos type devices
US3699646A (en) * 1970-12-28 1972-10-24 Intel Corp Integrated circuit structure and method for making integrated circuit structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01128249U (US08197722-20120612-C00042.png) * 1988-02-23 1989-09-01
JPH01128248U (US08197722-20120612-C00042.png) * 1988-02-23 1989-09-01

Also Published As

Publication number Publication date
FR2178930A1 (US08197722-20120612-C00042.png) 1973-11-16
DE2315761B2 (de) 1975-01-30
FR2178930B1 (US08197722-20120612-C00042.png) 1977-09-02
US3747200A (en) 1973-07-24
DE2315761A1 (de) 1973-10-11
GB1382936A (en) 1975-02-05

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