Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
  • H01L2224/85009—Pre-treatment of the connector or the bonding area

Landscapes

• Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Pressure Welding/Diffusion-Bonding (AREA)
• Electric Connection Of Electric Components To Printed Circuits (AREA)
• Wire Bonding (AREA)
• Lead Frames For Integrated Circuits (AREA)

Priority Applications (1)

Applications Claiming Priority (1)

Publications (2)

Family

ID=14983542

Family Applications (1)

Country Status (1)

• 1972
  • 1972-12-21 JP JP12838772A patent/JPS5517515B2/ja not_active Expired

Also Published As

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