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Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filedfiledCritical
Priority to JP12838772ApriorityCriticalpatent/JPS5517515B2/ja
Publication of JPS4983861ApublicationCriticalpatent/JPS4983861A/ja
Publication of JPS5517515B2publicationCriticalpatent/JPS5517515B2/ja
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
H01L2224/85009—Pre-treatment of the connector or the bonding area
Landscapes
Engineering & Computer Science
(AREA)
Computer Hardware Design
(AREA)
Microelectronics & Electronic Packaging
(AREA)
Power Engineering
(AREA)
Pressure Welding/Diffusion-Bonding
(AREA)
Electric Connection Of Electric Components To Printed Circuits
(AREA)