JPS4955241A - - Google Patents
Info
- Publication number
- JPS4955241A JPS4955241A JP48068003A JP6800373A JPS4955241A JP S4955241 A JPS4955241 A JP S4955241A JP 48068003 A JP48068003 A JP 48068003A JP 6800373 A JP6800373 A JP 6800373A JP S4955241 A JPS4955241 A JP S4955241A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/504—Adding; Subtracting in bit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/491—Computations with decimal numbers radix 12 or 20.
- G06F7/492—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
- G06F7/493—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination the representation being the natural binary coded representation, i.e. 8421-code
- G06F7/494—Adding; Subtracting
- G06F7/495—Adding; Subtracting in digit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
- G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US26301572A | 1972-06-15 | 1972-06-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS4955241A true JPS4955241A (enExample) | 1974-05-29 |
Family
ID=23000033
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP48068003A Pending JPS4955241A (enExample) | 1972-06-15 | 1973-06-15 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US3749899A (enExample) |
| JP (1) | JPS4955241A (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4160290A (en) * | 1978-04-10 | 1979-07-03 | Ncr Corporation | One-bit multifunction arithmetic and logic circuit |
| US4241413A (en) * | 1978-04-25 | 1980-12-23 | International Computers Limited | Binary adder with shifting function |
| US4218747A (en) * | 1978-06-05 | 1980-08-19 | Fujitsu Limited | Arithmetic and logic unit using basic cells |
| US4245328A (en) * | 1979-01-03 | 1981-01-13 | Honeywell Information Systems Inc. | Binary coded decimal correction apparatus for use in an arithmetic unit of a data processing unit |
| FR2463452B1 (fr) * | 1979-08-10 | 1985-10-11 | Sems | Dispositif additionneur et soustracteur, comportant au moins un operateur binaire, et operateur decimal comportant un tel dispositif |
| US4390962A (en) * | 1980-03-25 | 1983-06-28 | The Regents Of The University Of California | Latched multivalued full adder |
| US4604723A (en) * | 1983-10-17 | 1986-08-05 | Sanders Associates, Inc. | Bit-slice adder circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3106637A (en) * | 1957-12-31 | 1963-10-08 | Burroughs Corp | Arithmetic and logic system |
| SE300065B (enExample) * | 1967-09-08 | 1968-04-01 | Ericsson Telefon Ab L M | |
| US3596074A (en) * | 1969-06-12 | 1971-07-27 | Ibm | Serial by character multifunctional modular unit |
-
1972
- 1972-06-15 US US00263015A patent/US3749899A/en not_active Expired - Lifetime
-
1973
- 1973-06-15 JP JP48068003A patent/JPS4955241A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US3749899A (en) | 1973-07-31 |