JPS4947562U - - Google Patents
Info
- Publication number
- JPS4947562U JPS4947562U JP1972090175U JP9017572U JPS4947562U JP S4947562 U JPS4947562 U JP S4947562U JP 1972090175 U JP1972090175 U JP 1972090175U JP 9017572 U JP9017572 U JP 9017572U JP S4947562 U JPS4947562 U JP S4947562U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1972090175U JPS4947562U (en, 2012) | 1972-07-31 | 1972-07-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1972090175U JPS4947562U (en, 2012) | 1972-07-31 | 1972-07-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS4947562U true JPS4947562U (en, 2012) | 1974-04-25 |
Family
ID=28277255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1972090175U Pending JPS4947562U (en, 2012) | 1972-07-31 | 1972-07-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS4947562U (en, 2012) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5182055U (en, 2012) * | 1974-12-25 | 1976-07-01 | ||
JPS5553909Y1 (en, 2012) * | 1978-11-04 | 1980-12-13 | ||
JPS5553908Y1 (en, 2012) * | 1978-11-04 | 1980-12-13 |
-
1972
- 1972-07-31 JP JP1972090175U patent/JPS4947562U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5182055U (en, 2012) * | 1974-12-25 | 1976-07-01 | ||
JPS5553909Y1 (en, 2012) * | 1978-11-04 | 1980-12-13 | ||
JPS5553908Y1 (en, 2012) * | 1978-11-04 | 1980-12-13 |