JPS4944638A - - Google Patents

Info

Publication number
JPS4944638A
JPS4944638A JP47086892A JP8689272A JPS4944638A JP S4944638 A JPS4944638 A JP S4944638A JP 47086892 A JP47086892 A JP 47086892A JP 8689272 A JP8689272 A JP 8689272A JP S4944638 A JPS4944638 A JP S4944638A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP47086892A
Other languages
Japanese (ja)
Other versions
JPS5242501B2 (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP47086892A priority Critical patent/JPS5242501B2/ja
Priority to CA179,237A priority patent/CA979080A/en
Priority to US00389535A priority patent/US3829710A/en
Priority to GB3962973A priority patent/GB1418083A/en
Priority to AU59527/73A priority patent/AU478145B2/en
Priority to IT52254/73A priority patent/IT994173B/it
Priority to DE19732343805 priority patent/DE2343805C3/de
Priority to FR7331375A priority patent/FR2198325B1/fr
Priority to CH1248173A priority patent/CH569393A5/xx
Publication of JPS4944638A publication Critical patent/JPS4944638A/ja
Publication of JPS5242501B2 publication Critical patent/JPS5242501B2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Logic Circuits (AREA)
JP47086892A 1972-08-30 1972-08-30 Expired JPS5242501B2 (en:Method)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP47086892A JPS5242501B2 (en:Method) 1972-08-30 1972-08-30
CA179,237A CA979080A (en) 1972-08-30 1973-08-20 Logic circuit arrangement using insulated gate field effect transistors
US00389535A US3829710A (en) 1972-08-30 1973-08-20 Logic circuit arrangement using insulated gate field effect transistors
GB3962973A GB1418083A (en) 1972-08-30 1973-08-21 Logic circuit arrangement using insulated gate field effect transistors
AU59527/73A AU478145B2 (en) 1972-08-30 1973-08-22 A logic circuit arrangement using insulated gate field effect transistors
IT52254/73A IT994173B (it) 1972-08-30 1973-08-30 Sistemazione di circuito logico che usa transistor i g detti anche transistor ad effetto di campo a griglia isolata
DE19732343805 DE2343805C3 (de) 1972-08-30 1973-08-30 Logische Schaltungsanordnung
FR7331375A FR2198325B1 (en:Method) 1972-08-30 1973-08-30
CH1248173A CH569393A5 (en:Method) 1972-08-30 1973-08-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP47086892A JPS5242501B2 (en:Method) 1972-08-30 1972-08-30

Publications (2)

Publication Number Publication Date
JPS4944638A true JPS4944638A (en:Method) 1974-04-26
JPS5242501B2 JPS5242501B2 (en:Method) 1977-10-25

Family

ID=13899476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP47086892A Expired JPS5242501B2 (en:Method) 1972-08-30 1972-08-30

Country Status (1)

Country Link
JP (1) JPS5242501B2 (en:Method)

Also Published As

Publication number Publication date
JPS5242501B2 (en:Method) 1977-10-25

Similar Documents

Publication Publication Date Title
JPS527687Y2 (en:Method)
JPS5235049B2 (en:Method)
CS161039B1 (en:Method)
JPS4975091A (en:Method)
JPS499296U (en:Method)
JPS5242501B2 (en:Method)
CS154487B1 (en:Method)
JPS4975466U (en:Method)
CS156805B1 (en:Method)
JPS4995650U (en:Method)
CS165820B1 (en:Method)
CS151840B1 (en:Method)
CS153936B1 (en:Method)
CS163947B1 (en:Method)
CS161013B1 (en:Method)
CS157307B1 (en:Method)
JPS4876496A (en:Method)
CS159522B1 (en:Method)
JPS4962129U (en:Method)
CS160307B1 (en:Method)
CH559899A5 (en:Method)
CH566143A5 (en:Method)
CH588298A5 (en:Method)
CH571122A5 (en:Method)
CH568456A5 (en:Method)