Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filedfiledCritical
Priority to JP4013472ApriorityCriticalpatent/JPS5331353B2/ja
Publication of JPS493573ApublicationCriticalpatent/JPS493573A/ja
Publication of JPS5331353B2publicationCriticalpatent/JPS5331353B2/ja
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Landscapes
Engineering & Computer Science
(AREA)
Computer Hardware Design
(AREA)
Microelectronics & Electronic Packaging
(AREA)
Power Engineering
(AREA)
Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices
(AREA)