JPS4933232B1 - - Google Patents
Info
- Publication number
- JPS4933232B1 JPS4933232B1 JP12069670A JP12069670A JPS4933232B1 JP S4933232 B1 JPS4933232 B1 JP S4933232B1 JP 12069670 A JP12069670 A JP 12069670A JP 12069670 A JP12069670 A JP 12069670A JP S4933232 B1 JPS4933232 B1 JP S4933232B1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12069670A JPS4933232B1 (en:Method) | 1970-12-29 | 1970-12-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12069670A JPS4933232B1 (en:Method) | 1970-12-29 | 1970-12-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS4933232B1 true JPS4933232B1 (en:Method) | 1974-09-05 |
Family
ID=14792697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12069670A Pending JPS4933232B1 (en:Method) | 1970-12-29 | 1970-12-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS4933232B1 (en:Method) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54150740U (en:Method) * | 1978-04-12 | 1979-10-19 |
-
1970
- 1970-12-29 JP JP12069670A patent/JPS4933232B1/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54150740U (en:Method) * | 1978-04-12 | 1979-10-19 |