JPS4924987Y1 - - Google Patents
Info
- Publication number
- JPS4924987Y1 JPS4924987Y1 JP8115670U JP8115670U JPS4924987Y1 JP S4924987 Y1 JPS4924987 Y1 JP S4924987Y1 JP 8115670 U JP8115670 U JP 8115670U JP 8115670 U JP8115670 U JP 8115670U JP S4924987 Y1 JPS4924987 Y1 JP S4924987Y1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Details Of Resistors (AREA)
- Non-Adjustable Resistors (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8115670U JPS4924987Y1 (enExample) | 1970-08-14 | 1970-08-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8115670U JPS4924987Y1 (enExample) | 1970-08-14 | 1970-08-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS4924987Y1 true JPS4924987Y1 (enExample) | 1974-07-05 |
Family
ID=33246666
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8115670U Expired JPS4924987Y1 (enExample) | 1970-08-14 | 1970-08-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS4924987Y1 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006073879A (ja) * | 2004-09-03 | 2006-03-16 | Matsushita Electric Ind Co Ltd | 検出用抵抗器の実装基板 |
| JP2008187159A (ja) * | 2007-01-31 | 2008-08-14 | Toshiba Corp | プリント配線基板のパッドパターン、および電流または電圧の検出方法 |
-
1970
- 1970-08-14 JP JP8115670U patent/JPS4924987Y1/ja not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006073879A (ja) * | 2004-09-03 | 2006-03-16 | Matsushita Electric Ind Co Ltd | 検出用抵抗器の実装基板 |
| JP2008187159A (ja) * | 2007-01-31 | 2008-08-14 | Toshiba Corp | プリント配線基板のパッドパターン、および電流または電圧の検出方法 |