JPS49113550A - - Google Patents

Info

Publication number
JPS49113550A
JPS49113550A JP2277873A JP2277873A JPS49113550A JP S49113550 A JPS49113550 A JP S49113550A JP 2277873 A JP2277873 A JP 2277873A JP 2277873 A JP2277873 A JP 2277873A JP S49113550 A JPS49113550 A JP S49113550A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2277873A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2277873A priority Critical patent/JPS49113550A/ja
Publication of JPS49113550A publication Critical patent/JPS49113550A/ja
Priority to US05/624,237 priority patent/US3990014A/en
Pending legal-status Critical Current

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Landscapes

  • Manipulation Of Pulses (AREA)
JP2277873A 1973-02-26 1973-02-26 Pending JPS49113550A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2277873A JPS49113550A (en) 1973-02-26 1973-02-26
US05/624,237 US3990014A (en) 1973-02-26 1975-10-20 Pulse control circuit having manually variable output period between pulses

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2277873A JPS49113550A (en) 1973-02-26 1973-02-26

Publications (1)

Publication Number Publication Date
JPS49113550A true JPS49113550A (en) 1974-10-30

Family

ID=12092111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2277873A Pending JPS49113550A (en) 1973-02-26 1973-02-26

Country Status (1)

Country Link
JP (1) JPS49113550A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3323123A (en) * 1965-09-27 1967-05-30 Rutherford Electronics Co Range simulator for providing a controlled delay between an input trigger and an output pulse
JPS4837584A (en) * 1971-09-20 1973-06-02

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3323123A (en) * 1965-09-27 1967-05-30 Rutherford Electronics Co Range simulator for providing a controlled delay between an input trigger and an output pulse
JPS4837584A (en) * 1971-09-20 1973-06-02

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