JPS49103375U - - Google Patents
Info
- Publication number
- JPS49103375U JPS49103375U JP20873U JP20873U JPS49103375U JP S49103375 U JPS49103375 U JP S49103375U JP 20873 U JP20873 U JP 20873U JP 20873 U JP20873 U JP 20873U JP S49103375 U JPS49103375 U JP S49103375U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20873U JPS49103375U (en) | 1972-12-26 | 1972-12-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20873U JPS49103375U (en) | 1972-12-26 | 1972-12-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS49103375U true JPS49103375U (en) | 1974-09-05 |
Family
ID=39146350
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20873U Pending JPS49103375U (en) | 1972-12-26 | 1972-12-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS49103375U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53149560U (en) * | 1977-04-30 | 1978-11-25 | ||
| WO2018180255A1 (en) * | 2017-03-28 | 2018-10-04 | ローム株式会社 | Semiconductor device and method for manufacturing semiconductor device |
-
1972
- 1972-12-26 JP JP20873U patent/JPS49103375U/ja active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53149560U (en) * | 1977-04-30 | 1978-11-25 | ||
| WO2018180255A1 (en) * | 2017-03-28 | 2018-10-04 | ローム株式会社 | Semiconductor device and method for manufacturing semiconductor device |
| CN110520987A (en) * | 2017-03-28 | 2019-11-29 | 罗姆股份有限公司 | The manufacturing method of semiconductor devices and semiconductor devices |
| JPWO2018180255A1 (en) * | 2017-03-28 | 2020-02-06 | ローム株式会社 | Semiconductor device and method of manufacturing semiconductor device |
| CN110520987B (en) * | 2017-03-28 | 2023-10-27 | 罗姆股份有限公司 | Semiconductor device and method for manufacturing semiconductor device |