JPS49103370U - - Google Patents
Info
- Publication number
- JPS49103370U JPS49103370U JP20673U JP20673U JPS49103370U JP S49103370 U JPS49103370 U JP S49103370U JP 20673 U JP20673 U JP 20673U JP 20673 U JP20673 U JP 20673U JP S49103370 U JPS49103370 U JP S49103370U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20673U JPS49103370U (enrdf_load_stackoverflow) | 1972-12-26 | 1972-12-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20673U JPS49103370U (enrdf_load_stackoverflow) | 1972-12-26 | 1972-12-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS49103370U true JPS49103370U (enrdf_load_stackoverflow) | 1974-09-05 |
Family
ID=39146349
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20673U Pending JPS49103370U (enrdf_load_stackoverflow) | 1972-12-26 | 1972-12-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS49103370U (enrdf_load_stackoverflow) |
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1972
- 1972-12-26 JP JP20673U patent/JPS49103370U/ja active Pending