JPS4898661U - - Google Patents
Info
- Publication number
- JPS4898661U JPS4898661U JP2312572U JP2312572U JPS4898661U JP S4898661 U JPS4898661 U JP S4898661U JP 2312572 U JP2312572 U JP 2312572U JP 2312572 U JP2312572 U JP 2312572U JP S4898661 U JPS4898661 U JP S4898661U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Combinations Of Printed Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2312572U JPS5551010Y2 (en:Method) | 1972-02-24 | 1972-02-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2312572U JPS5551010Y2 (en:Method) | 1972-02-24 | 1972-02-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4898661U true JPS4898661U (en:Method) | 1973-11-21 |
| JPS5551010Y2 JPS5551010Y2 (en:Method) | 1980-11-27 |
Family
ID=27879048
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2312572U Expired JPS5551010Y2 (en:Method) | 1972-02-24 | 1972-02-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5551010Y2 (en:Method) |
-
1972
- 1972-02-24 JP JP2312572U patent/JPS5551010Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5551010Y2 (en:Method) | 1980-11-27 |