JPS4878868A - - Google Patents

Info

Publication number
JPS4878868A
JPS4878868A JP47007593A JP759372A JPS4878868A JP S4878868 A JPS4878868 A JP S4878868A JP 47007593 A JP47007593 A JP 47007593A JP 759372 A JP759372 A JP 759372A JP S4878868 A JPS4878868 A JP S4878868A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP47007593A
Other languages
Japanese (ja)
Other versions
JPS5538859B2 (enrdf_load_stackoverflow
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP759372A priority Critical patent/JPS5538859B2/ja
Priority to FR7300382A priority patent/FR2168316B1/fr
Priority to DE19732302649 priority patent/DE2302649A1/de
Priority to NL7300845A priority patent/NL7300845A/xx
Publication of JPS4878868A publication Critical patent/JPS4878868A/ja
Publication of JPS5538859B2 publication Critical patent/JPS5538859B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/64—Generators producing trains of pulses, i.e. finite sequences of pulses
    • H03K3/72—Generators producing trains of pulses, i.e. finite sequences of pulses with means for varying repetition rate of trains
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/68—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using pulse rate multipliers or dividers pulse rate multipliers or dividers per se
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/78—Generating a single train of pulses having a predetermined pattern, e.g. a predetermined number
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • H03K5/15093—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using devices arranged in a shift register

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
JP759372A 1972-01-21 1972-01-21 Expired JPS5538859B2 (enrdf_load_stackoverflow)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP759372A JPS5538859B2 (enrdf_load_stackoverflow) 1972-01-21 1972-01-21
FR7300382A FR2168316B1 (enrdf_load_stackoverflow) 1972-01-21 1973-01-05
DE19732302649 DE2302649A1 (de) 1972-01-21 1973-01-19 Impulsgenerator
NL7300845A NL7300845A (enrdf_load_stackoverflow) 1972-01-21 1973-01-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP759372A JPS5538859B2 (enrdf_load_stackoverflow) 1972-01-21 1972-01-21

Publications (2)

Publication Number Publication Date
JPS4878868A true JPS4878868A (enrdf_load_stackoverflow) 1973-10-23
JPS5538859B2 JPS5538859B2 (enrdf_load_stackoverflow) 1980-10-07

Family

ID=11670089

Family Applications (1)

Application Number Title Priority Date Filing Date
JP759372A Expired JPS5538859B2 (enrdf_load_stackoverflow) 1972-01-21 1972-01-21

Country Status (4)

Country Link
JP (1) JPS5538859B2 (enrdf_load_stackoverflow)
DE (1) DE2302649A1 (enrdf_load_stackoverflow)
FR (1) FR2168316B1 (enrdf_load_stackoverflow)
NL (1) NL7300845A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53105352A (en) * 1977-02-26 1978-09-13 Nippon Telegr & Teleph Corp <Ntt> Signal generator
JPS53105351A (en) * 1977-02-26 1978-09-13 Nippon Telegr & Teleph Corp <Ntt> Signal generator

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2292376A1 (fr) * 1974-11-19 1976-06-18 Inst Nat Sante Rech Med Generateur de signaux synchronisateurs a cadence programmee, aleatoire ou fixe
JPS54110745A (en) * 1978-02-20 1979-08-30 Hitachi Ltd Timing signal generating circuit
JPS54153563A (en) * 1978-05-24 1979-12-03 Nec Corp Logical array circuit
BE1002846A3 (fr) * 1989-02-21 1991-07-02 Leentjens Boes Sa Circuit de pilotage a l'usage de systemes de simulation et d'entrainement au tir.
US5039950A (en) * 1989-07-20 1991-08-13 Eastman Kodak Company Multiple clock synthesizer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4933172U (enrdf_load_stackoverflow) * 1972-06-23 1974-03-23

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3585371A (en) * 1969-07-25 1971-06-15 Amp Inc Controlled sequence programming means

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4933172U (enrdf_load_stackoverflow) * 1972-06-23 1974-03-23

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53105352A (en) * 1977-02-26 1978-09-13 Nippon Telegr & Teleph Corp <Ntt> Signal generator
JPS53105351A (en) * 1977-02-26 1978-09-13 Nippon Telegr & Teleph Corp <Ntt> Signal generator

Also Published As

Publication number Publication date
FR2168316B1 (enrdf_load_stackoverflow) 1975-10-31
DE2302649A1 (de) 1973-08-09
FR2168316A1 (enrdf_load_stackoverflow) 1973-08-31
NL7300845A (enrdf_load_stackoverflow) 1973-07-24
JPS5538859B2 (enrdf_load_stackoverflow) 1980-10-07

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