JPS4814259A - - Google Patents
Info
- Publication number
- JPS4814259A JPS4814259A JP3880672A JP3880672A JPS4814259A JP S4814259 A JPS4814259 A JP S4814259A JP 3880672 A JP3880672 A JP 3880672A JP 3880672 A JP3880672 A JP 3880672A JP S4814259 A JPS4814259 A JP S4814259A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/003—Changing the DC level
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Shift Register Type Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15332371A | 1971-06-15 | 1971-06-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4814259A true JPS4814259A (en:Method) | 1973-01-22 |
| JPS5213898B1 JPS5213898B1 (en:Method) | 1977-04-18 |
Family
ID=22546716
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP47038806A Pending JPS5213898B1 (en:Method) | 1971-06-15 | 1972-04-19 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3708688A (en:Method) |
| JP (1) | JPS5213898B1 (en:Method) |
| DE (1) | DE2224738A1 (en:Method) |
| FR (1) | FR2142457A5 (en:Method) |
| GB (1) | GB1364799A (en:Method) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50154130A (en:Method) * | 1974-06-06 | 1975-12-11 | ||
| JP2016197863A (ja) * | 2011-05-19 | 2016-11-24 | 株式会社半導体エネルギー研究所 | 集積回路 |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3794856A (en) * | 1972-11-24 | 1974-02-26 | Gen Instrument Corp | Logical bootstrapping in shift registers |
| US3857045A (en) * | 1973-04-17 | 1974-12-24 | Nasa | Four-phase logic systems |
| US4048518A (en) * | 1976-02-10 | 1977-09-13 | Intel Corporation | MOS buffer circuit |
| JPS52115637A (en) * | 1976-03-24 | 1977-09-28 | Sharp Corp | Mos transistor circuit |
| US4042833A (en) * | 1976-08-25 | 1977-08-16 | Rockwell International Corporation | In-between phase clamping circuit to reduce the effects of positive noise |
| US4117348A (en) * | 1977-07-11 | 1978-09-26 | Rockwell International Corporation | Multi-phase clock monitor circuit |
| US4996454A (en) * | 1989-06-30 | 1991-02-26 | Honeywell Inc. | Hot clock complex logic |
| US7230447B2 (en) * | 2003-10-31 | 2007-06-12 | Texas Instruments Incorporated | Fault tolerant selection of die on wafer |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3567968A (en) * | 1967-02-27 | 1971-03-02 | North American Rockwell | Gating system for reducing the effects of positive feedback noise in multiphase gating devices |
| US3564299A (en) * | 1969-01-16 | 1971-02-16 | Gen Instrument Corp | Clock generator |
| US3588537A (en) * | 1969-05-05 | 1971-06-28 | Shell Oil Co | Digital differential circuit means |
-
1971
- 1971-06-15 US US00153323A patent/US3708688A/en not_active Expired - Lifetime
-
1972
- 1972-04-19 JP JP47038806A patent/JPS5213898B1/ja active Pending
- 1972-05-19 GB GB2355772A patent/GB1364799A/en not_active Expired
- 1972-05-20 DE DE19722224738 patent/DE2224738A1/de active Pending
- 1972-06-05 FR FR7221473A patent/FR2142457A5/fr not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50154130A (en:Method) * | 1974-06-06 | 1975-12-11 | ||
| JP2016197863A (ja) * | 2011-05-19 | 2016-11-24 | 株式会社半導体エネルギー研究所 | 集積回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| US3708688A (en) | 1973-01-02 |
| GB1364799A (en) | 1974-08-29 |
| DE2224738A1 (de) | 1972-12-21 |
| FR2142457A5 (en:Method) | 1973-01-26 |
| JPS5213898B1 (en:Method) | 1977-04-18 |