JPH1197376A - High breakdown strength semiconductor device and fabrication thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent intrusion of oxygen or other noxious gas during high temperature heat treatment of a semiconductor substrate by setting the concentration of oxygen being diffused into the range of a depletion layer, being generated upon application of a phase voltage to the pn junction of the semiconductor substrate, at a specified level or below. SOLUTION: A silicon oxide 11 is deposited on the oxidized surface of a silicon semiconductor substrate and implanted with baron ions 12 to form a p<+> layer 13. The p<+> layer 13 is subjected to drive in diffusion to form a P base layer 14 which is brought into pn junction 15. In this regard, the concentration of oxygen being diffused into the range of a depletion layer, being generated upon application of a phase voltage to the pn junction 15, is set at 7 ppm (3.5×10<17> atoms/cm<3> ) or below. Subsequently, silicon oxides 16, 18 and 20 are deposited and a phosphorus glass layer 23 is deposited thereon. Thereafter, cathode 24, anode 25 and gate 26 electrodes are formed and a polyimide is deposited and patterned.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a high withstand voltage and a large capacity, and more particularly to a manufacturing process which is excellent in the yield and the reproducibility of the withstand voltage.

[0002]

2. Description of the Related Art Conventionally, in a method of manufacturing a silicon semiconductor device, gallium or aluminum is used as a p-type dopant for forming a pn junction in a high-withstand-voltage large-current element having a withstand voltage of several kV or more, and a medium- or small-voltage with a lower voltage is used. Boron is widely used in devices. This is because gallium and aluminium diffuse quickly in silicon and easily form a deep diffusion layer, and boron is easily ion-implanted and diffused by a device / method, and is easily controlled in concentration.

[0003] In addition, diffusion, oxidation, annealing and the like at 900 ° C
After the above-mentioned high-temperature heat treatment, the temperature is gradually cooled to about 750 ° C., and thereafter, it is taken out from the heat treatment apparatus (heat treatment furnace) and naturally cooled. The gradual cooling to about 750 ° C. is performed to prevent generation of defects in the silicon crystal, particularly dislocation lines (slip lines) due to plastic deformation. This is because the silicon crystal is structurally sensitive and has a strong temperature dependence of the crystal strength, and does not undergo plastic deformation at room temperature, but easily undergoes plastic deformation at a high temperature of about 750 ° C. or more when a rapid temperature change is given. The reason for taking out from the heat treatment apparatus at about 750 ° C. and allowing it to cool naturally is that one is to prevent oxygen diffused into the crystal from becoming a donor by heat treatment at about 450 ° C. and fluctuating the resistivity of the crystal. Another reason is to improve productivity by shortening the cooling time.

Japanese Patent Application Laid-Open Nos. 49-67566 and 49-67566 disclose related methods for manufacturing these semiconductor devices.
9-53763 and JP-A-8-45946. Japanese Patent Application Laid-Open No. 5-11416, Japanese Patent Application Laid-Open No. 8-148
No. 501 and the like.

[0005]

In manufacturing a silicon semiconductor device having a high breakdown voltage and a large current with a high yield, good reproducibility, and high reliability, the following problems are required.

[0006] 1. Due to the high resistivity of the silicon semiconductor substrate used, in other words, the low dopant concentration and high purity, thermal donors and heavy metal impurities (lifetime),
It is sensitive to Bulk Micro Defects (BMD).

[0007] 2. A deep diffusion layer is required for manufacturing a high breakdown voltage element, and a long-time heat treatment is performed at a high temperature. At this time, oxygen and other impurities are likely to be mixed into the crystal. In particular, the diffusion rate of oxygen in silicon is several orders of magnitude higher than that of other dopants, and oxygen diffuses deeply into the crystal. Oxygen diffused and introduced into a silicon crystal is more likely to become a donor than oxygen mixed during crystal growth, causing a change (decrease) in the resistivity of the crystal, and a reduction in lifetime due to compounding with other impurities. It is known that it is likely to become a nucleus causing microcrystal defects.

3. A silicon semiconductor substrate for a high withstand voltage and high current device has a large diameter and a large thickness, and the temperature distribution in the substrate is likely to be non-uniform upon cooling after high-temperature heat treatment. Is difficult to secure.

4. If the high breakdown voltage element can be manufactured by the same process (for example, unifying the diffusion source) as the medium and small breakdown voltage element, the management of the manufacturing line becomes easy, the use efficiency of the apparatus can be improved, and the cost can be reduced.

[0010] Therefore, intrusion of oxygen and other harmful impurities during the high-temperature heat treatment of the semiconductor substrate is prevented as much as possible. It is an issue to prevent a defect from being a nucleus. In particular, when a p-type diffusion layer for a pn junction is formed by boron diffusion, special consideration is required because an extremely long-time high-temperature heat treatment is performed.

In the above prior art, no special consideration is given to such a specific problem of manufacturing a high withstand voltage and large current element.

[0012]

The above object can be attained by the following method, and a high breakdown voltage and large current semiconductor device can be manufactured with a high yield.

1. In order to prevent the diffusion of oxygen into the semiconductor substrate, the atmosphere for the drive-in diffusion at a high temperature for a long time should be oxygen [O ₂ ] and an oxygen compound (steam [H ₂ O], nitrous oxide [N ₂ O]). , Carbon dioxide [CO ₂ ] etc.)
Nitrogen [N ₂ ], hydrogen [H ₂ ] or an inert gas (argon [Ar], helium [He]) and a mixed gas thereof.

2. Similarly, it is necessary to prevent oxygen from diffusing and entering as much as possible in the step before the drive-in diffusion at a high temperature for a long time. The concentration distribution after the oxygen introduced in the step before the drive-in diffusion is further diffused by the drive-in diffusion has a profile represented by the following equation.
From this, the allowable amount of oxygen diffusion amount (diffusion condition) in the process before the drive-in diffusion can be calculated.

[0015]

N = (2N ₀ / π) √ (D ₁ t ₁ / D ₂ t ₂ ) exp [−
{X / ₂ } (D ₂ t ₂ )} ² ] where N: oxygen concentration profile in the semiconductor substrate after drive-in diffusion N ₀ : solid solubility of oxygen in the process conditions before drive-in diffusion D ₁ : Diffusion coefficient of oxygen under the condition of the process before drive-in diffusion D ₂ : Diffusion coefficient of oxygen under the condition of the drive-in diffusion process t ₁ : Heat treatment time under the condition of the process before the drive-in diffusion t ₂ : Drive-in diffusion 2. Heat treatment time under process conditions x: Depth from surface of semiconductor substrate Furthermore, it is necessary that oxygen diffused into the semiconductor substrate crystal be made in an electrically and crystallographically inactive state and not in an active state that adversely affects device characteristics. is there. For example, thermal donor (TD) is performed by heat treatment at about 450 ° C.
), TD annihilation by heat treatment around 650 ° C and generation of new donors (Oxidation Induced Stacking) by heat treatment around 1200 ° C
It is known that changes such as Faults (OSF) occur. That is, OSF is likely to be generated in a high-temperature heat treatment, and oxygen precipitation in various states occurs in a medium-low temperature heat treatment. In particular, in manufacturing a high breakdown voltage element, since the pn junction is formed at a position deep from the substrate surface, the characteristics of the crystal inside the substrate (bulk) are more important than the surface layer, and fluctuations in the crystal inside such as donors are reduced. It is necessary to avoid heat treatment temperatures under conditions that promote generation.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 3 is a schematic cross-sectional view showing a manufacturing process of a 6 kV-6 kA gate turn-off thyristor (GTO). In the GTO, several thousand unit elements having an area of several 100 μm ² are formed on one substrate, and the drawing shows a cross section of the unit element. Note that the scale (double size) of the cross-sectional dimension of the semiconductor element is displayed with emphasis on easy-to-understand accuracy rather than accuracy, as usual.

FIG. 1A shows a silicon semiconductor crystal substrate 10. The quality of the crystal substrate 10 is as follows: manufacturing method: floating zone (FZ) method, crystal orientation (111) plane, conductivity type n-type (doping by neutron irradiation), resistivity 315 ± 15
Ω-cm, thickness 1.050 mm, diameter 150 mmφ, oxygen concentration 2.5 × 10 ¹⁵ atoms / cm ³ (50 ppb) or less. (B) shows a state where the silicon semiconductor crystal substrate 10 is oxidized to form a silicon oxide film 11 on the surface. The oxidation is performed at 900 ° C. for 15 minutes in a dry oxygen stream, and the thickness of the formed silicon oxide film is 75 nm. this is,
This is to prevent channeling at the time of ion implantation in the next step. At this time, oxygen is diffused and introduced into the silicon semiconductor crystal substrate 10, the concentration of which is maximum C _s = 1 × 10 ¹⁷ atoms / cm ^{3 on} the surface of the crystal substrate and the diffusion depth x _j = 5 μm.
m, the diffusion amount is Q = 1.
3 × 10 ¹² atoms / cm ² .

FIG. 3C shows a state in which boron ions 12 for forming the p base layer are implanted. For boron ion implantation, an acceleration voltage of 75 kV and a dose of 3 × 10 ¹⁵ io
A p + layer 13 of ns / cm ² and a depth of about 0.2 μm was formed.

FIG. 3D shows a state in which the p-base layer 14 is formed by drive-in diffusion of the boron ion-implanted layer. The conditions for drive-in diffusion are temperature 1250 ° C and time
For 150 hours, the atmosphere was initially in an oxygen stream for 45 minutes, and thereafter in a nitrogen stream. Atmosphere is selected in the beginning by the outward diffusion of boron due to the formation of a silicon oxide film (Out-D
This is to prevent iffusion) and to prevent surface roughness due to the formation of a silicon nitride film and its crystallization, and then to switch to nitrogen to prevent diffusion of oxygen into the crystal. As a result, the boron diffusion depth x _j = 60
A p base layer 14 of ± 3 μm and a maximum concentration C _s = 2 × 10 ¹⁸ atoms / cm ³ is formed, and a pn junction 15 is formed.

At this time, the concentration of oxygen introduced by diffusion is:
When introduced in a complementary error function distribution in an oxygen atmosphere at the beginning of the diffusion and when it is Gaussian distributed in a nitrogen atmosphere, the maximum C _s becomes 0.7 × 10 ¹⁷ atoms / cm ³ . In the embodiment of the present invention, the ion implantation layer of boron has been described as an example for forming the p-based layer. However, the effect of the present invention is not limited to boron. A similar impurity concentration distribution and oxygen concentration distribution can be obtained by appropriately setting the process conditions using gallium or aluminum which is a Group 3 atom as the p-type impurity.

FIG. 2E shows a state in which a silicon oxide film 16 for use as a mask for selective diffusion of phosphorus is formed. The silicon was oxidized at 1100 ° C. for 120 minutes in a water vapor atmosphere to form a silicon oxide film 16 having a thickness of about 1.0 μm. Thereafter, a window was opened by photolithography using a double-sided aligner. Under this condition, the distribution of oxygen already diffused into the crystal substrate hardly changes.

(F) shows a state where phosphorus is diffused. Phosphorus diffusion conditions are as follows: phosphorus oxytrichloride (POC
l ₃ ) at a diffusion temperature of 900 ° C. for a time of 70 min. (G) shows a state in which a silicon oxide film 18 for use as a mask for etching the gate electrode wiring region is formed. The silicon was oxidized at 1100 ° C. for 5 hours in a water vapor atmosphere to form a silicon oxide film 18 having a thickness of about 1.6 μm. Thereafter, a window was opened by a usual photolithography method. As described above, the distribution of oxygen already diffused and introduced into the crystal substrate hardly changes.

(H) shows a state where the gate electrode wiring region is etched. A groove 19 having a depth of 29 μm was formed by semi-isotropic etching at a discharge pressure of 10 Pa using a mixed gas of freon (CF ₄ ) and oxygen by a microwave dry etching apparatus.

FIG. 2I shows a state in which a silicon oxide film 20 for masking selective diffusion of boron is formed and boron is diffused. This is for forming the p emitter layer 21 and the gate contact layer 22. The oxidation conditions are the same as in the case (e). The boron diffusion conditions are such that a boron nitride wafer (BN) is used as a source and a diffusion temperature is 1020.
° C, time 120 min.

Thereafter, in order to adjust the profile of the entire diffusion layer, a diffusion heat treatment was performed at 1200 ° C. for 16 hours in an oxygen-nitrogen mixed gas flow.

(J) shows a case where phosphorus glass (P) is deposited on a silicon oxide film formed in a previous step for passivation between a cathode and a gate at a substrate temperature of 405 ° C. by a CVD method.
SG) layer 23 was deposited and baked at 1000 ° C. for 30 minutes in an oxygen atmosphere. This step is the final high-temperature treatment, and what should be noted here is the cooling method. First, a non-oxidizing atmosphere such as nitrogen or argon is used to control the surface charge density. Second, since oxygen diffused into the silicon crystal is likely to become a donor by heat treatment at about 450 ° C., the oxygen is gradually cooled at about 1 ° C./min in a heat treatment furnace from 700 to 600 ° C. It is important to take it out and blow it with cold air of about -70 ° C to forcibly quench it. It is to be noted that discarding in liquid nitrogen for rapid cooling is more effective in preventing the formation of donors, but discarding directly in liquid is not preferable because the wafer is damaged.

Further, patterning was performed by photolithography.

(K), the respective electrodes of the cathode 24, the anode 25, and the gate 26 are formed by sputtering aluminum (at a substrate heating temperature of 200 to 230 ° C.) and photolithography, and further form a polyimide film 27 as an insulating protective film for the gate wiring. The state after coating and patterning is shown.

Thus, the wafer process of the gate turn-off thyristor is completed, and thereafter, it is pelletized and packaged.

The reason for selecting the above process conditions will be described in detail below.

FIG. 1 shows a diffusion concentration profile of dopant and oxygen in a silicon semiconductor substrate crystal. In addition, the spreading region of the depletion layer of the pn junction is also shown. The oxygen diffusion concentration profile was calculated from the atmosphere of boron drive-in diffusion (step (d) in FIG. 3). It can be seen that the oxygen concentration profile can be controlled by adjusting the drive-in diffusion atmosphere. That is, when the drive-in diffusion is performed for 150 hours in an oxygen atmosphere, the vicinity of the depletion layer of the pn junction in the substrate is about 10 × 10 ¹⁷ which is close to the solid solubility limit at the diffusion temperature.
Oxygen of atoms / cm ³ is introduced. As the time in the oxygen atmosphere for drive-in diffusion is shortened and the time in the non-oxidizing (nitrogen) atmosphere is lengthened, the amount of oxygen introduced and diffused can be reduced.

The circles in FIG. 2 show the relationship between oxygen near the depletion layer of the pn junction in the silicon substrate and the breakdown voltage yield of the device.
The oxygen concentration on the horizontal axis is from FIG. The withstand voltage yield on the vertical axis is a small TEG (Test Element
Group). 12 from 150mmφ substrate
Individual TEGs were collected, and about 200 samples were evaluated under each condition. As the breakdown voltage defect, the voltage-current characteristic mainly shows a soft waveform, and the applied voltage number 100
The leakage current increases from 3.0 to 5.0 of the voltage from about 1000 V to about 1000 V.
The phenomenon increases in proportion to the power.

When the entire process of drive-in diffusion is performed in an oxygen atmosphere or when the diffusion time in the oxygen atmosphere is long, the breakdown voltage yield between the anode and the cathode is not good (large leak current), and the pn junction in the silicon crystal is poor. It can be seen that when the oxygen concentration of the depletion layer is 3.5 × 10 ¹⁷ atoms / cm ³ or less, the breakdown voltage yield is improved. These phenomena are considered to be caused by a precipitate with oxygen in the silicon crystal as a nucleus.

On the other hand, all oxide films (11 in FIG. 3C)
Is removed and the entire process of drive-in diffusion is performed in a nitrogen atmosphere, the breakdown voltage yield between the anode and the cathode is good, but it has the following two disadvantages. One is the gate-
The leakage current between the cathodes increases. This is because a silicon nitride film is formed on the silicon substrate surface during drive-in diffusion at high temperature and for a long time, and this crystallizes and, after cooling to room temperature, applies a large stress to the silicon substrate surface layer. It is estimated that this is the case. The other is that the lifetime varies widely. The lifetime of minority carriers in the substrate n-layer is usually 80 to 120 μs, but may be reduced to about 10 μs in some cases. This is presumed to be due to the fact that there is no masking effect of the silicon oxide film, and it is likely to be contaminated with a trace amount of heavy metals and the like, although the analysis has not been carried out at the detection limit or less.

X1, X2, X3, and X4 marks in FIG. 2 show the effect of the cooling method after the high-temperature treatment on the relationship between oxygen near the depletion layer of the pn junction in the silicon substrate and the breakdown voltage yield of the device.

The mark X1 was forcibly cooled by blowing cold air from 600 to 700 ° C., the mark X2 was immersed in liquid nitrogen and forcibly cooled, and the mark X3 was taken out of the furnace and discharged in the air as usual. The cooled ones and X4 indicate the ones that were left in the furnace and cooled. Withstand pressure yield is 150mmφ TE
G1 lot is based on 25 wafers. As a breakdown voltage defect, the breakover voltage is mainly lowered. Inspection of the inside of the crystal substrate having a withstand voltage defect shows that the resistivity of the substrate is lowered. In particular, it is often found in lots having a low cooling rate and set near the center of the holder, and it is presumed that oxygen diffused and introduced into the crystal during cooling turned into a donor. When a large number of large-diameter silicon semiconductor substrates are processed, it is understood that the temperature distribution in the lot and in the wafer needs to be controlled not only at high temperatures but also at cooling.

In the above embodiment, the manufacturing process of the 6 kV gate turn-off thyristor has been described.
The donor of oxygen diffused and introduced into the silicon crystal is generated at a maximum of about 3 × 10 ¹² atoms / cm ³ at the time of cooling, which is equivalent to reducing the resistivity of 200 Ω-cm by 10%. For this reason, it can be seen that similar care is required in the process of manufacturing a high breakdown voltage semiconductor device of about 4 kV or more using a silicon substrate having a resistivity of 200 Ω-cm or more.

As a method of forming a pn junction with little introduction of oxygen into a crystal, in addition to the above-described ion implantation and drive-in diffusion in a non-oxidizing atmosphere, an epitaxial growth method on a substrate, and a deposition method on a substrate A drive-in diffusion method or the like from the doped silicon film is also possible.

[0040]

According to the present invention, a high-voltage silicon semiconductor device can be mass-produced with high yield and high reproducibility by a simple process.

[Brief description of the drawings]

FIG. 1 is a graph showing a diffusion profile of a dopant and the like in a silicon semiconductor substrate of the present invention.

FIG. 2 is a graph showing the relationship between the concentration of oxygen diffused and introduced into a silicon semiconductor substrate of the present invention and the yield withstand voltage.

FIG. 3 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention for each manufacturing process.

[Explanation of symbols]

10: silicon semiconductor substrate, 12: boron ion implantation, 14: p-type (boron) diffusion layer, 15: pn junction.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Isamu Isabi 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Within Hitachi Research Laboratory, Hitachi, Ltd.

Claims (6)

[Claims] In a semiconductor device having a pn junction formed by diffusing a dopant for inverting the conductivity type of a silicon semiconductor substrate into a pn junction, a range of a depletion layer generated when a reverse voltage is applied to the pn junction of the semiconductor substrate. A high breakdown voltage semiconductor device, characterized in that the concentration of oxygen diffused into the semiconductor device is 7 ppm (3.5 × 10 ¹⁷ atoms / cm ³ ) or less. 2. Implanting ions for inverting the conductivity type of a silicon semiconductor substrate into a silicon semiconductor substrate, and then heating the substrate to a high temperature in a predetermined non-oxidizing atmosphere to diffuse the ions into the substrate to form a pn junction. Forming a high breakdown voltage semiconductor device. 3. Depositing a silicon film containing a dopant that inverts the conductivity type of the substrate on the main surface of the silicon semiconductor substrate, and heating the substrate to a high temperature in a predetermined non-oxidizing atmosphere to remove the dopant. A method for manufacturing a high-breakdown-voltage semiconductor device, comprising forming a pn junction by diffusing a semiconductor device into a substrate. 4. The atmosphere according to claim 2, wherein the amount of oxygen introduced into said silicon semiconductor substrate during diffusion is 3.5 × 10 ¹⁷ atoms / cm ³ or less. A method for manufacturing a high-breakdown-voltage semiconductor device, characterized by using an atmosphere having such an oxygen amount. 5. The high breakdown voltage semiconductor device according to claim 4, wherein the atmosphere during the diffusion of the dopant into the silicon semiconductor substrate is an oxygen atmosphere only at the beginning of the diffusion, and thereafter a non-oxidizing gas atmosphere. Manufacturing method. 6. After the silicon semiconductor crystal substrate is subjected to a high-temperature heat treatment, the temperature of the crystal substrate is at least 500 ° C. to 40 ° C.
A method for manufacturing a high-breakdown-voltage semiconductor device, characterized by quenching between 0 ° C. to prevent oxygen diffused and introduced into said crystal substrate from becoming a donor.