JPH1195713A - Connection circuit between external image equipment and liquid crystal panel part - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a connection circuit between an external image equipment and a liquid crystal panel part preventing a noise from occurring in a display screen of a liquid crystal panel. SOLUTION: This circuit is provided with the external image equipment 1 having a graphic controller circuit 2 and a driver circuit 3 multiplexing the image data, a control signal and a clock signal from the graphics controller circuit 2 and outputting them to connection lines and the liquid crystal panel part 5 having a receiver circuit 6 inputted with the image data, control signal and clock signal multiplexed by the connection lines 9a, 9b from the driver circuit 3 and a liquid crystal panel drive circuit 7 inputted with the image data, control signal and clock signal from the receiver circuit 6, and is provided with a grounded line 9c directly connecting only the driver circuit 3 to only the receiver circuit 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a connection circuit between an external image device and a liquid crystal panel, and more particularly, to an LVDS (Low Voltage Digital Input) as a digital interface for transmitting digital signals from the external image device to the liquid crystal panel.
iffrential signaling: a small-amplitude interface according to IEEE 1596.3).

[0002]

2. Description of the Related Art In recent years, a personal computer (hereinafter referred to as a personal computer) as an external image device and a laser
Disc playback devices and video tape recorder devices (VT
R) The number of liquid crystal panels using liquid crystals as monitors for displaying images and the like is increasing because they take up less space and become cheaper. At present, image signals transmitted from an external image device to the liquid crystal panel are transmitted as analog signals, and digital signals are transmitted as digital signals. The liquid crystal panel part of the interface is mixed. In addition, the commercialization of the liquid crystal panel unit having the digital interface tends to increase. The liquid crystal panel section includes, for example, a liquid crystal panel of 1024 × 768 pixels (XGA) which can display 16.7 million colors and an LVD as a digital interface for driving the liquid crystal panel.
S is used.

Here, a conventional circuit for connecting an external image device to a liquid crystal panel by the LVDS will be described. FIG. 2 is a block diagram showing a connection circuit between a liquid crystal panel and a personal computer as a conventional external image device.
As shown in FIG. 2, a personal computer 1 as an external image device includes at least a graphics controller circuit 2.
And a liquid crystal interface driver circuit 3 (hereinafter referred to as a driver circuit) and a power supply circuit 4. The driver circuit 3 includes at least a parallel-serial conversion circuit 3a.
And a PLL (Phase Locked Loop) circuit 3b. The clock signal from the PLL circuit 3b controls the conversion for multiplexing the image data by the parallel-serial conversion circuit 3a. Have been.

Further, the graphics controller circuit 2 and the driver circuit 3 are connected by, for example, 29 parallel signal lines, and R (red) · G from the graphics controller circuit 2 is connected.
An output signal composed of (green) and B (blue) image data of 8 bits each (total 24 bits), a control signal (4 bits) such as a horizontal synchronizing signal and a vertical synchronizing signal, and a clock signal serving as a reference time is provided by a driver. Input to the circuit 3.
The power supply circuit 4 supplies the graphics controller circuit 2 and the driver circuit 3 with, for example, + 5V.
And a connection line 4b serving as a ground (GND) line. In addition, the power supply circuit 4 is connected to a ground line 4c to obtain a ground potential.
For example, it is grounded to a chassis (not shown).

The liquid crystal panel section 5 includes at least a liquid crystal interface receiver circuit 6 (hereinafter, referred to as a receiver circuit), a liquid crystal panel drive circuit 7, and a liquid crystal panel 8. The receiver circuit 6 includes at least a data extraction / serial / parallel conversion circuit 6a and a PLL circuit 6b. The clock signal from the PLL circuit 6b causes the data extraction / serial / parallel conversion circuit 6a to operate. ,
It is configured such that data extraction from multiplexed image data and the like and serial-parallel conversion are controlled. The receiver circuit 6 includes the liquid crystal panel drive circuit 7
The liquid crystal panel drive circuit 7 is connected to the liquid crystal panel 8 by a plurality of signal lines, and the power supply circuit 4 is connected to, for example, a voltage of + 5V. Is connected to the receiver circuit 6, the liquid crystal panel drive circuit 7, and the liquid crystal panel 8 by a connection line 4a for supplying the liquid crystal panel and a connection line 4b serving as a ground (GND) line.

The parallel-to-serial conversion circuit 3a of the driver circuit 3 and the data extraction / serial-to-parallel conversion circuit 6a of the receiver circuit 6 are configured to store 24-bit image data
Since bit control signals are multiplexed and transmitted by LVDS, they are connected by eight connection lines 9a consisting of four pairs of twisted pairs.
The PLL circuit 3b of the receiver circuit 6 and the PLL circuit 6b of the receiver circuit 6 are connected to each other by two pairs of a pair of twisted wires 9 for transmitting a clock signal from the PLL circuit 3b.
b.

[0007]

However, the aforementioned L
The digital interface using the VDS is composed of ten connection lines 9 composed of 5 pairs (4 pairs + 1 pair) of twisted pairs.
The personal computer 1 and the liquid crystal panel unit 5 are connected by a and 9b.
The multiplexed image data is transmitted to the receiver circuit 6 of the liquid crystal panel unit 5 at a signal level of, for example, about 0.3 V and a small amplitude level.
It converts and restores the original image data, control signal and clock signal.

At this time, the ground potential of the ground terminal 3c of the driver circuit 3 on the transmitting side, which constitutes the digital interface provided in the personal computer body 1, and the liquid crystal panel unit 5
In some cases, a potential difference may occur between the ground potential of the ground terminal 6c of the receiver circuit 6 on the receiving side. This is because the ground potential of the ground terminal 3c of the driver circuit 3 and the receiver circuit 6
The ground potential of the ground terminal 6c is temporarily determined by grounding via the connection line 4b of the power supply circuit 4 and the ground line 4c. The connection line 4b of the power supply circuit 4 In addition to the connection line 4b between the receiver 3 and the receiver circuit 6, the connection line 4b also includes the graphics controller circuit 2 constituting the personal computer 1 and the liquid crystal panel drive circuit 7 constituting the liquid crystal panel unit 5. For this reason, the connection lines 4b are formed as relatively long lines on a printed circuit board (not shown), and signal currents from respective circuits flow.

These currents are pulse currents because each of the above-described circuit configurations is a digital circuit, and the pulse currents cause a voltage drop due to the resistance and reactance of the connection line 4b. In addition, the voltage drop varies in each circuit due to a change in the pulse current flowing through the driver circuit 3 or the receiver circuit 6, and the ground potential at the ground terminal of each circuit fluctuates. Due to the fluctuation of the ground potential of the ground terminal of each circuit, a potential difference (for example, about 1-2 V) between the ground potential of the ground terminal 3c of the driver circuit 3 and the ground potential of the ground terminal 6c of the receiver circuit 6 as described above. May occur.

The ground potential of the ground terminal 3c of the driver circuit 3 and the ground potential of the ground terminal 6c of the receiver circuit 6 become respective reference potentials when the driver circuit 3 and the receiver circuit 6 operate. However, a potential difference may occur between the reference potential of the driver circuit 3 and the reference potential of the receiver circuit 6 as described above. Therefore, when a potential difference occurs between the ground potential of the ground terminal 3c of the driver circuit 3 and the ground potential of the ground terminal 6c of the receiver circuit 6, the signal transmitted from the driver circuit 3 by the ten connection lines 9a and 9b is changed. For example, the signal has a small amplitude level of about 0.3 V, and a voltage of the potential difference (for example, about 1 to 2 V) is added to the signal of about 0.3 V, and signal processing is performed in the receiver circuit 6. Since the addition of the potential difference accounts for a large proportion of the signal of the small amplitude level,
The signal is greatly affected by the difference in ground potential between the ground terminal 3c of the driver circuit 3 and the ground terminal 6c of the receiver circuit 6. This means that if the potential difference between the driver circuit 3 and the receiver circuit 6 is 1 V, for example, 0.3 V
The signal of (0 V and 0.3 V) is subjected to signal processing in the receiver circuit 6 as a signal of 1.3 V (1 V and 1.3 V) by adding the above 1 V. As described above, although the signal from the driver circuit 3 is converted and restored by the receiver circuit 6, it is sometimes not restored exactly to the original signal, but is restored to an erroneous signal and the liquid crystal panel which is a display screen is displayed. 8 has a problem of generating noise.

The present invention provides a solution to this problem, and an object of the present invention is to provide a connection circuit between an external image device and a liquid crystal panel unit which does not generate noise on the display screen of the liquid crystal panel 8. is there.

[0012]

According to the present invention, a connection circuit between an external image device and a liquid crystal panel according to the present invention includes a graphics controller circuit, and image data, control signals and clock signals from the graphics controller circuit. An external image device having a driver circuit for a liquid crystal interface that multiplexes and outputs to a plurality of connection lines, and the multiplexed image data, control signal, and clock signal from the driver circuit for the liquid crystal interface are input. A liquid crystal panel unit having a liquid crystal interface receiver circuit, and a liquid crystal panel driving circuit to which image data, a control signal, and a clock signal from the liquid crystal interface receiver circuit are input; and Only the liquid crystal interface receiver circuit is directly connected. It is that it comprises a ground line to be connected.

In the connection circuit for connecting an external image device to a liquid crystal panel according to the present invention, a connection line for connecting a liquid crystal interface driver circuit and the liquid crystal interface receiver circuit and a ground line are arranged in one connector. That is.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing a connection circuit between a personal computer as an external image device of the present invention and a liquid crystal panel unit. In FIG. 1, the same components as those shown in the conventional example of FIG.

As shown in FIG. 1, a personal computer 1 as an external image device includes at least a graphics controller circuit 2, a driver circuit 3, and a power supply circuit 4. Further, the driver circuit 3 includes a parallel-serial conversion circuit 3a for parallel-serial conversion of at least a signal output from the graphics controller circuit 2, and a PLL.
And a conversion circuit for multiplexing image data and the like by the parallel-serial conversion circuit 3a is controlled by a clock signal from the PLL circuit 3b.

The liquid crystal panel section 5 includes at least a receiver circuit 6, a liquid crystal panel drive circuit 7, and a liquid crystal panel 8. The receiver circuit 6 receives at least an output signal (28 bits) from the driver circuit 3. And a data extraction / serial-parallel conversion circuit 6a for performing serial-parallel conversion while extracting data from the input signal.
And an L circuit 6b. The data extraction / serial-parallel conversion circuit 6a performs data extraction from multiplexed image data and the like and serial-parallel conversion by the clock signal from the PLL circuit 6b. It is configured to be controlled.

The graphics controller circuit 2 is connected to the driver circuit 3 by a plurality of (for example, 29) parallel signal lines. The driver circuit 3 is connected to the receiver circuit 6 by, for example, five sets of parallel signal lines. The receiver circuit 6 is connected to the liquid crystal panel drive circuit 7 by a plurality of (for example, 29) parallel signal lines, which are connected by ten twisted pairs of connection lines 9a and 9b and one ground line 9c. The liquid crystal panel drive circuit 7 is connected to the liquid crystal panel 8 by a plurality of signal lines. The ground wire 9
c is a direct connection between only the ground terminal 3c of the drive circuit 3 and only the ground terminal 6c of the receiver circuit 6, and the connection lines 9a and 9 for transmitting multiplexed image data and the like.
A dedicated G for determining the ground potential as a reference for b
An ND line is formed, and the ground ends 3c and 6c are connected to a ground pattern (not shown) on a printed circuit board (not shown).

The power supply circuit 4 is a connection line for supplying, for example, a voltage of +5 V to the graphics controller circuit 2, the driver circuit 3, the receiver circuit 6, the liquid crystal panel drive circuit 7, and the liquid crystal panel 8. 4a and a connection line 4b serving as a ground (GND) line, and the power supply circuit 4 is grounded to, for example, a chassis (not shown) by a ground line 4c. The connection lines 4b constitute a ground pattern (not shown) of a printed circuit board (not shown), for example.

The parallel-serial conversion circuit 3a of the driver circuit 3 and the data extraction / serial-parallel conversion circuit 6a of the receiver circuit 6 convert the 24-bit image data and the 4-bit control signal into parallel data. Since they are multiplexed by the serial conversion circuit 3a, they are connected by eight connection lines 9a consisting of four twisted pairs, and the PLL circuit 3b of the driver circuit 3 and the PLL circuit of the receiver circuit 6 6b are connected by two connecting wires 9b, each of which is a pair of twisted wires for transmitting a clock signal. The ground terminal 3c of the driver circuit 3 and the ground terminal 6c of the receiver circuit 6 are connected directly to a ground (GND) line 9.
c and the ground line 9c
Is, for example, the drive circuit 3 for maintaining the ground potential.
And a ground pattern (not shown) formed near the receiver circuit 6. The connection line 4
b and the ground line 9c are electrically connected.

Next, the operation will be described. First, an analog R (red), G (green), B (blue) color signal, an analog horizontal synchronizing signal (HSYNC) and a vertical synchronizing signal (VSYNC) (not shown) are output from the personal computer 1. And the like are output as output signals, and these analog output signals are input to the graphics controller circuit 2. Then, in the graphics controller circuit 2, each of the analog signals is a total of 2 bits composed of 8-bit R, B, and G signals.
4-bit image data 2a and a horizontal synchronization signal (HSYN)
C) and a vertical synchronizing signal (VSYNC), etc., and converted into a digital signal of a control signal 2b of a total of 4 bits and a clock signal 2c serving as a reference signal, and output.

Each digital signal output from the graphics controller circuit 2 is
The 28-bit (24 bits + 4 bits) signal of the image data 2a and the control signal 2b, which is input to the driver circuit 3 and is converted from parallel to serial by a parallel-to-serial conversion circuit 3a of the driver circuit 3, It multiplexes and outputs to the connection line 9a. A clock signal is output from the PLL circuit 3b to the connection line 9b.

Further, the signal transmission by the ten connection lines 9a and 9b composed of the five pairs (4 pairs + 1 pair) of the twisted pair is performed, for example, by about 3 mA corresponding to the signal by the twisted pair.
Signal, and a signal (for example, about 100Ω) (not shown) is connected in parallel to the twisted pair, and a signal is transmitted by detecting a voltage drop (about 0.3 V) of the current caused by the resistance. Is what you do.

The data extraction / reception of the receiver circuit 6
In the serial-parallel conversion circuit 6a, the image data (24 bits) output from the graphics controller circuit 2 multiplexed by the parallel-serial conversion circuit 3a of the driver circuit 3 and the control signal (4 bits) Are converted and restored to original image data (24 bits) and a control signal (4 bits). At this time, the transfer rate from the driver circuit 3 is, for example, 140 Mbytes.
/ s. Then, the data extraction / reception of the receiver circuit 6 is performed.
The image data (24 bits), the control signal (4 bits), and the clock signal from the serial-parallel conversion circuit 6a and the PLL circuit 6b are input to the liquid crystal panel drive circuit 7 via signal lines. A signal for driving the liquid crystal panel 8 is output from the liquid crystal panel driving circuit 7 according to the input digital signal, and the output signal is input to the liquid crystal panel 8 as a display screen, and an image is displayed on the liquid crystal panel 8. Is displayed.

Although not shown, the direct connection of the ground line 9c is, for example, G which forms a power supply line for driving an output signal processing circuit provided in the driver circuit 3.
A ground terminal of the ND line and a GN constituting a power supply line for driving an input signal processing circuit provided in the receiver circuit 6
It is provided so as to connect with the ground end of the D line.
A ground line 9c directly connecting the ground terminal 3c of the driver circuit 3 and the ground terminal 6c of the receiver circuit 6 provides a connection line 9a from the driver circuit 3 to the receiver circuit 6,
A dedicated ground (GND) line serving as a reference potential (GND potential) for the multiplexed signal transmitted by 9b is configured. Since the grounding line 9c is directly connected, a voltage drop due to the resistance of the grounding line 9c is small, and a substantially common ground potential that does not fluctuate can be maintained. Also, this ground line 9c is
Together with the ten connection lines 9a and 9b, for example, they are interconnected via an 11-pin connector (not shown).

Although the embodiment of the present invention has been described with reference to the block diagram in which the liquid crystal panel is connected to a personal computer as an external image device, the connection with the liquid crystal panel is not limited to the personal computer. For example, it goes without saying that an external image device such as a video camera, a laser disk reproducing device, or a video tape recorder (VTR) that can output an image signal or the like to a liquid crystal panel unit may be used. The connection lines 9a and 9b and the ground line 9c are
Instead of being constituted by one connector, they may be separated, and of course, two types of connectors consisting of 10 pins and 2 pins may be used. Although the power supply circuit 4 has been described in connection with the embodiment provided in the personal computer 1, the power supply circuit 4 is not limited to this.
May be provided in the liquid crystal panel unit 5, and the power supply circuit 4 may be provided in both the external image device 1 and the liquid crystal panel unit 5. Although the image data is 24-bit data (8 bits × 3: RGB) as an embodiment of the present invention, the present invention is not limited to this. For example, 21 bits (7 bits × 3: RGB) or 27 bits Bit (9 bits x 3: RGB)
It may be.

[0026]

As described above, the connection circuit between the external image device and the liquid crystal panel according to the present invention includes the ground line for directly connecting only the liquid crystal interface driver circuit and only the liquid crystal interface receiver circuit. Therefore, since the ground potential of the ground terminal of the driver circuit for liquid crystal interface and the ground terminal of the receiver circuit for liquid crystal interface can be obtained from the same ground line directly connected, a common ground with little variation is provided. An electric potential can be obtained. From this, the reception signal received by the receiver circuit for the liquid crystal interface is stable with respect to the driver circuit, so that the receiver circuit does not malfunction, and therefore, a stable display screen without noise due to malfunction is generated. This has the effect that it can be obtained.

In the connection circuit for connecting an external image device and a liquid crystal panel according to the present invention, since the connection line and the ground line are arranged in one connector, an inexpensive connection without increasing the number of parts is required. A circuit can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a connection circuit between a personal computer main body and a liquid crystal panel according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional connection circuit between a personal computer main body and a liquid crystal panel unit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Personal computer main body (external image equipment) 2 Graphics controller circuit 3 Liquid crystal interface driver circuit 3a Parallel-serial conversion circuit 3b PLL circuit 4 Power supply circuit 4a, 4b Connection line 4c Grounding line 5 Liquid crystal panel unit 6 Liquid crystal interface receiver Circuit 6a Data extraction / serial-parallel conversion circuit 6b PLL circuit 7 Liquid crystal panel drive circuit 9a, 9b Connection line 9c Ground line

Claims (2)

[Claims] A graphics controller circuit;
An external image device having a driver circuit for a liquid crystal interface for multiplexing image data, a control signal, and a clock signal from the graphics controller circuit and outputting the multiplexed signal to a plurality of connection lines; A liquid crystal interface receiver circuit to which the multiplexed image data, control signal and clock signal are inputted, and a liquid crystal panel drive circuit to which image data, control signal and clock signal from the liquid crystal interface receiver circuit are inputted And a liquid crystal panel section having a ground line for directly connecting only the liquid crystal interface driver circuit and only the liquid crystal interface receiver circuit. Connection circuit. 2. The external image according to claim 1, wherein a connection line for connecting the liquid crystal interface driver circuit and the liquid crystal interface receiver circuit and the ground line are arranged in one connector. Connection circuit between equipment and LCD panel.