JPH1185664A - Computer system provided with bus expanding device and spatial address allocating method for the device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allocate the spatial address of a bus expanding device to each expansion slot without applying the authority to an expanded card to be inserted to each expansion slot. SOLUTION: When activating a system, a preservation control part 6b acquires a spatial address amount to be used for each expanded card inserted to plural expansion slots from each expanded card and respectively allocates an address area corresponding to the correspondent spatial address amount to each inserted expanded card, and data showing the allocated address area are stored in plural registers 6 correspondent for each expanded card. When any one of the expanded cards is accessed from a processor during system activation, a selection control part refers to data stored in this register 6a so as to discriminate the expanded card to which the address with that access corresponds, and the select signal is issued to the correspondent expanded card.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer system having a bus expansion device for expanding a data transmission bus, and an address space dividing method in the computer system.
In particular, the present invention relates to a computer system provided with a bus expansion device for managing address space allocation to a plurality of expansion slots and mediating access to these expansion slots from a processor, and an address space allocation method in the device.

[0002]

2. Description of the Related Art Conventionally, in a computer system such as a computer, a bus expansion device is used to expand a data transmission bus. Specifically, the bus expansion device
A processor bus to which a processor such as a CPU is connected;
It is provided between an expansion slot into which various types of expansion cards are inserted, and plays a role of mediating access from the processor to each expansion slot.

In order to fulfill this role, in this bus expansion device, the address space provided by the processor must be divided into expansion slots and allocated in advance. The assignment method in this case is as follows.

First, as a first method, an address space given by a processor is "equally" assigned to each expansion slot.
And allocating the data. Next, as a second method, instead of uniformly allocating the address space given by the processor, a large address is assigned to a specific slot so that an expansion card requiring a large address space can be inserted. There is a method of allocating space.

[0005]

However, according to the first method, as the number of expansion slots used increases, the amount of address space allocated to each expansion slot decreases. Therefore, there is a problem that an expansion card requiring a large address space cannot exchange data with the processor bus via the bus expansion device.

To avoid this problem, as shown in the second method, a large address space is allocated to a specific slot so that an expansion card requiring a large address space can be inserted. Can be considered. However, in this method, since the address is fixedly assigned to the specific slot, expansion cards to be inserted into the specific slot are limited, and only the specific address space fixedly assigned can be used. There is a problem.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to make it possible to effectively use an address space and expand an address space without restricting an expansion card to be inserted into each expansion slot. It is an object of the present invention to provide a computer system having a bus expansion device that can be assigned to a slot and an address space allocating method in the device.

[0008]

A computer system according to the present invention comprises a processor bus, an expansion bus for expanding the processor bus, and a bus expansion device provided between the processor bus and the expansion bus. A plurality of expansion slots connected to the expansion bus and into which an expansion card can be inserted, wherein the bus expansion device includes an address used by each of the expansion cards inserted into the plurality of expansion slots. Means for acquiring a space amount; means for assigning an address area corresponding to the corresponding address space amount to each of the inserted expansion cards;
Means for storing the data indicating the assigned address area for each expansion card, and referring to the data stored in the storage means when an access to any of the expansion cards is received from a processor. Thus, there is provided a means for judging which expansion card corresponds to the address associated with the access, and a means for issuing a select signal to the expansion card indicated by the judgment result of the judgment means.

[0009] The computer system may further include a CPU slot connected to the processor bus, into which the bus expansion device can be inserted. Also,
In the above computer system, it is preferable that the expansion card inserted into the plurality of expansion slots holds data indicating the amount of address space used by the expansion card. In this case, the acquisition means provided in the bus expansion device has means for reading data held by the expansion card.

[0010] The storage means may be configured to also store data indicating an address area used by itself. Further, the storage means may be configured to have a plurality of registers.

[0011] The computer system may further comprise a processor slot connected to the processor bus, into which a processor card accessible to the expansion card can be inserted.

[0012] The expansion card inserted into the plurality of expansion slots may be accessible to an expansion card inserted into another expansion slot via the bus expansion device.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an overall configuration of a computer system including a bus expansion device according to an embodiment of the present invention. As shown in FIG. 1, the computer system is provided with a CPU 1 for controlling the entire CPU system.

The CPU 1 is connected to a CPU bus 2 and controls input and output of addresses and data relating to a plurality of CPU slots 3 and 4 connected to the CPU bus 2.

The CPU bus 2 connects the CPU 1 and the CPU slots 3 and 4, and functions as an interface between the CPU 1 and the CPU slots 3 and 4. CPU
The slot 3 is connected to the CPU bus 2 and allows a CPU card 5 to be inserted therein, for example, as shown in the figure, and enables communication between the CPU bus 2 and the CPU card 5.

When the CPU card 5 is inserted into the CPU slot 3, the CPU card 5
(Slot-A to Slot-D) so that addresses and data can be transmitted and received.

The CPU slot 4 is connected to the CPU bus 2 and has a bus expansion device 6 inserted therein, for example, as shown in the figure, and enables communication between the CPU bus 2 and the bus expansion device 6. .

The bus expansion device 6 can transmit and receive addresses and data between the CPU bus 2 and the expansion bus 7 when the bus expansion device 6 is inserted into the CPU slot 4. The details of the bus expansion device 6 will be described later.

The expansion bus 7 connects the bus expansion devices 6 and expansion slots 8 (Slot-A to Slot-D), and connects the bus expansion devices 6 to the expansion slots 8 (Slot-A to Slot-D). Acts as an interface between

An expansion slot 8 (Slot-A to Slot-D) is connected to an expansion bus 7 and an expansion card 9 (Card-A).
To Card-D) can be inserted arbitrarily, thereby enabling communication between the expansion bus 7 and the expansion cards 9 (Card-A to Card-D).

When the expansion card 9 (Card-A to Card-D) is inserted into the expansion slot 8 (Slot-A to Slot-D), the expansion card 9, the bus expansion device 6, and the CPU bus 2 control the CP.
Data and addresses can be transmitted to and received from the U1 and the CPU card 5.

Each of the expansion cards 9 (Card-A to Card-D) holds data indicating the amount of address space used by itself, and the data can be referred to from the bus expansion device 6. Each of the expansion cards (Card-A to Card-D) can access an expansion card other than the expansion card via the bus expansion device 6 to transmit and receive addresses and data.

FIG. 2 is a diagram for explaining the assignment of the address space of the CPU 1 shown in FIG. 1 and the assignment of the address space of the bus expansion device 6. As shown in FIG. 1, the address space of the CPU 1 is divided into CPU slots 3, 4,.
It is divided corresponding to the U card 5 and the bus expansion device 6). In the address space, the bus expansion device address space corresponding to the CPU slot 4 (bus expansion device 6) includes an area corresponding to an internal register (described later) provided in the bus expansion device 6, and an expansion slot 8 (Slot). -A ~ Slot
-D) and an area corresponding to the expansion card 9 (Card-A to Card-D) to be inserted into the expansion card 9 (five areas in total).

It is assumed that the address space amount used by the internal register itself is "P0". In addition, expansion card 9 (Card
-A to Card-D) use "P"
Fig. 3 is a block diagram showing the internal configuration of the bus expansion device 6 shown in Fig. 1. As shown in Fig. 3, the bus expansion device 6 has an internal register 6a, a storage control A section 6b and a selection control section 6c are provided.

The internal register 6a includes information indicating an address area used by the internal register itself, and an expansion card 9 (Card) inserted into an expansion slot 8 (Slot-A to Slot-D).
-A to Card-D) can be stored. Specifically, the internal register 6a stores the registers REG0, RE
G1, REG2, REG3 are provided.

The register REG0 stores the address space amount "P0" used by the internal register itself. This "P
"0" means the value of the last address in the address area used by the internal register itself.

The register REG1 stores the above “P0”,
“P0 + P1” is stored as a value obtained by adding the address space amount “P1” used by the expansion card Card-A. This “P0 + P1” means that it is the value of the last address in the address area used by the expansion card Card-A.

The register REG2 stores “P0 + P”
“P0 + P1 + P2” is stored as a value obtained by adding the address space amount “P2” used by the expansion card Card-B to “1.” The “P0 + P1 + P2” is the expansion card Ca
This means that rd-B is the value of the last address in the address area used.

The register REG3 stores the above “P0 + P1”.
+ P2 ”to the value obtained by adding the address space amount“ P3 ”used by the expansion card Card-C to“ P0 + P1 + P2 +
P3 "is stored. This" P0 + P1 + P2 + P3 "is stored.
Means the value of the last address in the address area used by the expansion card Card-C. Note that the register REG4 may be provided in the same manner as described above, but is omitted in the present embodiment because there is no problem even if it does not exist (see FIG. 3).

When the system is started, the storage control unit 6b obtains the address space amount from each of the inserted expansion cards, notifies the CPU 1 of information indicating the address area of each expansion card, and stores the information in the internal register 6a. Control for

That is, the storage control unit 6b stores an expansion card 9 (Card-A) in each of the expansion slots 8 (Slot-A to Slot-D).
~ Card-D) is inserted, and
The function of reading the data of the address space amount to be used from the expansion card 9 inserted in the expansion slot 8, the notification of the address space amount used by the internal register itself to the CPU 1, and the register REG in the internal register 6a.
0, a function of calculating the value of the last address used by each expansion card 9 based on the read data of the address space amount, a function of notifying the CPU 1 of each calculated value of the last address, and an internal register. R in 6a
EG1 to REG3. The selection control unit 6c determines whether the CP
Access from the CPU card 5 inserted in the U slot 3 or from the expansion card 9 (Card-A to Card-D) inserted in the expansion slot 8 (Slot-A to Slot-D) When an access is input, control is performed to send a slot selection signal to the expansion slot indicated by the access.

That is, the selection control unit 6c responds to an address associated with access from either the CPU card 5 or the expansion card 9 (Card-A to Card-D), and responds to the address and the register REG0 in the internal register 6a. To REG3 in order to derive which expansion slot the access is for,
A function of sending a slot selection signal to the derived expansion slot destination.

Next, referring to the flowchart of FIG.
The processing procedure by the storage control unit 6b will be described. At the time of system startup, an access is made to the expansion cards inserted into the expansion slots 8 (Slot-A to Slot-D), and data of the address space amount to be used is read from the inserted expansion cards (step A1).

Thereafter, the address space amount "P0" used by the internal register itself is notified to the CPU 1 and stored in the register REG0 in the internal register 6a (step A2). As a result, the value of the last address in the address area used by the internal register itself is stored.

Next, the expansion card Ca is added to the above “P0”.
“P0 + P1” is notified to the CPU 1 and stored in the register REG1 as a value obtained by adding the address space amount “P1” used by the rd-A (step A3). As a result, the value of the last address in the address area used by the expansion card Card-A is stored in the register REG1.

Next, as a value obtained by adding the address space amount "P2" used by the expansion card Card-B to the above "P0 + P1", "P0 + P1 + P2" is notified to the CPU 1 and stored in the register REG2 (step A).
4). As a result, the value of the last address in the address area used by the expansion card Card-B is stored in the register REG2.

Next, in the above “P0 + P1 + P2”,
As a value obtained by adding the address space amount “P3” used by the expansion card Card-C, “P0 + P1 + P2 + P3” is used as the CP
Notify U1 and store it in register REG3 (step A5). As a result, the value of the last address in the address area used by the expansion card Card-C is stored in the register REG3.

In the above processing, if no expansion card is inserted in the expansion slot, the address space amount is treated as 0. Next, a processing procedure by the selection control unit 6c will be described with reference to a flowchart of FIG.

During system startup, an access from the CPU card 5 inserted into the CPU slot 3 or an access from any of the expansion cards inserted into the expansion slots 8 (Slot-A to Slot-D). It is input (step B1).

In this case, first, it is determined whether or not the address associated with the access is smaller than the value stored in the register REG0 in the internal register 6a (step B).
2). If it is smaller here, the address is regarded as corresponding to the internal register 6a, and access to the internal register 6a is executed (step B3).

If it is not smaller in the step B2, it is determined whether or not the address is smaller than the value stored in the register REG1 (step B4).
If it is small here, the address is the expansion card Card
-A, and issues a select signal to slot Slot-A (step B5).

If it is not smaller in the step B4, it is determined whether or not the address is smaller than the value stored in the register REG2 (step B6).
If it is small here, the address is the expansion card Card
-B, and issues a select signal to slot Slot-B (step B7).

If it is not smaller in the step B6, it is determined whether or not the address is smaller than the value stored in the register REG3 (step B8).
If it is small here, the address is the expansion card Card
-C, and issues a select signal to slot Slot-C (step B9).

If it is not small in step B8, the address is regarded as corresponding to the expansion card Card-D, and a select signal is issued to the slot Slot-D (step B10).

Thus, the expansion card that has received the select signal recognizes that it has received the access request. As described above, according to the embodiment, at the time of system startup,
By obtaining the amount of address space used by each of the expansion cards 9 (Card-A to Card-D) inserted into the expansion slots 8 (Slot-A to Slot-D), each of the expansion cards 9 (Card-A to Card-D) is obtained. Card
Information indicating the address area of -D) is stored in the internal register 6a of the bus expansion device. Also, when an access is made during system startup, a select signal can be sent to the expansion card at the access destination indicated by the address by comparing the address associated with the access with the value in the internal register 6a. Becomes

Since the bus expansion device according to the above-described embodiment is configured as described above, the address space can be used effectively, and there is no restriction on expansion cards requiring a large address space. Note that the present invention is not limited to the above-described embodiment, and can be implemented with various modifications within the scope of the present invention.

[0047]

As described above in detail, according to the present invention, the address space of the bus expansion device is assigned to each expansion slot according to the amount of address space used by the expansion card inserted into the expansion slot. The space can be used effectively, and there is no restriction on an expansion card requiring a large address space.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an overall configuration of a computer system including a bus expansion device according to an embodiment of the present invention.

FIG. 2 is a diagram for explaining address space allocation of a CPU shown in FIG. 1 and address space allocation of a bus expansion device.

FIG. 3 is a block diagram showing an internal configuration of the bus expansion device shown in FIG. 1;

FIG. 4 is a flowchart for explaining a processing procedure by a storage control unit shown in FIG. 3;

FIG. 5 is a flowchart for explaining a processing procedure by a selection control unit shown in FIG. 3;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... CPU, 2 ... CPU bus, 3,4 ... CPU slot, 5 ... CPU card, 6 ... Bus expansion device, 6a ... Internal register, 6b ... Save control unit, 6c ... Selection control unit, 7 ... Extension bus, 8 ... expansion slots, 9 ... expansion cards.

Claims (10)

[Claims] 1. A processor bus, an expansion bus for expanding the processor bus, a bus expansion device provided between the processor bus and the expansion bus, and an insertion of an expansion card connected to the expansion bus A plurality of expansion slots, wherein the bus expansion device obtains an address space amount used by each of expansion cards inserted into the plurality of expansion slots; Means for respectively allocating an address area corresponding to the corresponding address space amount to each of the expansion cards; means for storing data indicating the allocated address areas in association with each of the expansion cards; When an access to any of them is received, it is referred to by referring to the data stored in the storage means. A computer system comprising: means for determining which expansion card the address associated with the access corresponds to; and means for issuing a select signal to the expansion card indicated by the determination result of the determination means. 2. The computer system according to claim 1, further comprising a CPU slot connected to said processor bus, said CPU slot being capable of inserting said bus expansion device. 3. The computer system according to claim 1, wherein the expansion card inserted into the plurality of expansion slots holds data indicating an address space amount used by the expansion card. 4. The computer system according to claim 3, wherein said acquisition means provided in said bus expansion device includes means for reading data held by said expansion card. 5. The computer system according to claim 1, wherein said storage means also stores data indicating an address area used by itself. 6. The computer system according to claim 1, wherein said storage means has a plurality of registers. 7. The computer system according to claim 1, wherein said computer system further comprises a processor slot connected to said processor bus, into which a processor card accessible to said expansion card can be inserted. 8. An expansion card inserted into the plurality of expansion slots can access an expansion card inserted into another expansion slot via the bus expansion device. 2. The computer system according to 1. 9. A processor bus, an expansion bus for expanding the processor bus, a bus expansion device provided between the processor bus and the expansion bus, and insertion of an expansion card connected to the expansion bus. A computer system having a plurality of expansion slots capable of allocating an address space given to the bus expansion device to the plurality of expansion slots. Obtaining the amount of address space used by each of the expansion cards inserted into the expansion slots of the above, and allocating an address area corresponding to the corresponding amount of address space to each of the inserted expansion cards, Data indicating the allocated address area is stored in a plurality of registers corresponding to each expansion card. Address space allocation method characterized by a step of 憶. 10. When the processor receives an access to any of the expansion cards during the activation of the system, the processor refers to the data stored in the register to determine the address of the expansion card. 10. The address space allocating method according to claim 9, further comprising: a step of determining whether or not the address card corresponds to the above, and a step of issuing a select signal to the expansion card indicated by the result of the determination.