JPH1174807A - Phase synchronization device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid deterioration of a phase noise characteristic due to interference by using two VCOs with different high frequency characteristics with respect to a multiple 2PLL high speed changeover type frequency synthesizer. SOLUTION: A multiplier circuit 16 multiplying a frequency of a received signal by a multiple of M is provided between an RF switch circuit 15 and a PLL 12 having a VCO 11 oscillated at a frequency of a multiple of 1/M of an output frequency flout of the RF switch circuit 15 as its internal circuit and a difference is given to oscillating frequencies of VCOs 11,13. Then even when PLLs 12, 14 are synchronously with each other at a same frequency simultaneously, the mutual interference of the oscillation by the VCOs 11, 13 is avoided and a VCO with a strong odd number harmonic characteristic is adopted for the VCO 11, then the effect of the VCO 11 in existence in the PLL 12 onto the PLL 14 is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase synchronizer used for an oscillator that oscillates at a constant frequency.

[0002]

2. Description of the Related Art As a conventional example, FIG. 6 shows a 2PLL high-speed switching type frequency synthesizer circuit using two PLL circuits and a frequency switching switch circuit, which are general phase synchronizers. 61 is a first PLL circuit, 62 is a second PLL
L circuit, 63 is a frequency changeover switch circuit, f6v1
Is the output signal of the first PLL circuit 61, f6v2 is the second PL
The output signal f6out of the L circuit 62 is an output signal of the frequency changeover switch circuit 63.

Next, the operation will be described. 1st PLL
The circuit 61 and the second PLL circuit 62 oscillate independently. The signal f6v output from the first PLL circuit 61
1 and the signal f6v2 output from the second PLL circuit 62.
Is input to the frequency changeover switch circuit 63. The frequency changeover switch circuit 63 selects one of the input signals f6v1 and f6v2 according to an external control signal, and sets the selected signal as an output signal f6out of the frequency changeover switch circuit 63.

[0004]

In the 2 PLL high-speed switching type frequency synthesizer circuit configured as described above, the first PLL circuit 61 and the second PLL circuit 62 oscillate independently. However, in practice, the first PLL
When the oscillating frequencies of the circuit 61 and the second PLL circuit 62 are the same frequency, or when the oscillating frequencies are almost the same but there is a small frequency difference, interference called a beat occurs.

Here, beat interference will be described. The present invention is mainly used for a base station of a second generation cordless telephone system. The wireless access method of the second generation cordless telephone system is a four-channel multiplex multi-carrier T
This is a DMA-TDD (time division multiple access-time division both transmission) method.

The frame structure of TDMA-TDD is 5 m
Since there are eight slots in one frame of s, the time per slot is 0.625 ms. This TDMA-T
In a communication system using DD, the base station needs to switch frequencies at high speed. When the frequency is alternately switched between the two PLLs, one slot, that is, 0.625 ms
It is sufficient that the switching is performed within this time, but actually, there is a state in which the two PLLs are oscillating at the time of switching. If almost the same frequency oscillates at the same time in the two PLLs, interference occurs and a frequency swell called a beat occurs, which causes phase noise.

More specifically, each PL used in the 2PLL high-speed switching type frequency synthesizer circuit of the present invention.
Each of the L circuits independently has a configuration as shown in FIG.
Referring to FIG. 7, a PLL circuit includes an oscillation signal f of a predetermined frequency.
x, a reference frequency divider 72 for dividing the oscillation signal fx to a reference frequency to output a reference signal fr, and an output signal fv from a voltage controlled oscillator (hereinafter, VCO) 77. A comparison frequency divider 73 that outputs a comparison signal fp and a phase of the reference signal fr and a phase of the comparison signal fp are compared, and phase difference signals fu and f based on the comparison result are obtained.
d, and the phase difference signal fu,
a charge pump 75 that inputs fd and outputs a control signal fc based on the phase difference signals fu and fd, and an LPF 76 that smoothes the control signal fc and outputs an LPF output signal fa from which unnecessary harmonic components have been removed. A VCO 77 that outputs an output signal fv having a frequency corresponding to the voltage charge pump circuit of the LPF output signal fa.

A reference frequency divider 72 divides an oscillation signal fx of a predetermined frequency of the crystal oscillator 71 into a reference frequency to generate a reference signal f.
r is output to the phase comparator 74. The comparison divider 73 is VC
The output signal fv output from O77 is frequency-divided based on the set frequency, and the comparison signal fp is output to the phase comparator 74.

The phase comparator 74 compares the phase of the reference signal fr with the phase of the comparison signal fp, and outputs phase difference signals fu and fd based on the comparison result to the charge pump 75. The charge pump 75 outputs a control signal fc based on the phase difference signals fu and fd to the LPF 76. The LPF 76 smoothes the control signal fc of the charge pump 75 and removes unnecessary harmonic components, and outputs the LPF output signal fa to the VCO 77 as a correction value of the oscillation frequency. Then, an output signal fv of a frequency corresponding to the voltage charge pump circuit of the LPF output signal fa
Is output from the VCO 77, and the output signal fv is fed back to the comparison frequency divider 73.

By repeatedly performing such an operation, the signal fp obtained by dividing the output signal fv of the VCO 77 based on the set frequency is finally locked to the reference signal fr, and as a result, the output signal fv of the VCO 77 Are locked to the reference signal fr.

Here, when two PLL circuits shown in FIG. 7 exist in the same module as shown in FIG. 6, the other VCO output signals interfere with each other inside the PLL circuit synchronous loop. VCO output signal causes beat interference, and the phase noise characteristic deteriorates.

The cause of the beat interference is that the other V
When the CO output signal interferes with the inside of the PLL circuit synchronous loop, the output signal fv of the VCO 77 inside the own loop is affected to generate noise Δfv, and the comparison frequency divider 73 calculates fv + Δfv
Is entered. Therefore, an error corresponding to the noise Δfv is added to each of the phase comparator 74, the charge pump 75, and the LPF 76.

Therefore, the LPF output from the LPF 76
The output signal fa outputs a voltage value of fa + Δfa including an error of Δfa to the VCO 77 as a voltage control signal. The VCO 77 having received the interference continues to input the voltage control signal including the error, and as a result, the phase noise characteristic of the output signal fv of the VCO 77 is deteriorated.

However, installing two PLL circuits in the same module is indispensable for realizing a 2 PLL high-speed switching type frequency synthesizer circuit.
There is a demand for improvement while keeping two PLL circuits.

According to the present invention, even if two PLL circuits are installed in the same module, both VCO output signals do not cause beat interference, and as a result, the phase noise characteristic does not deteriorate.
It is an object of the present invention to realize a PLL high-speed switching type frequency synthesizer circuit.

Note that two PLLs are switched at a high speed.
As prior arts of the PLL frequency synthesizer, there are JP-A-6-164429, JP-A-5-191302, and JP-A-7-303059. The effect is different in the following points.

1. In this prior art, the outputs of two PLL circuits are combined to output one channel (desired frequency), which is not suitable for high-speed frequency switching. Since the PLL circuit is independent and has no concept of synthesizing the output, it corresponds to high-speed switching of the frequency. Further, in this prior art, in order to obtain a local signal with less unnecessary spurious, both a divider circuit and a multiplier circuit and a synthesizing circuit are required in the same system for each of the two PLL synthesizers. Although a plurality of stages are necessary, the configuration of the present invention is simple because of the idea of inserting one of a multiplying circuit or a dividing circuit and an RF switch circuit into each of the 2 PLL synthesizers. Furthermore, in this prior art, in order to obtain a local signal with less unnecessary spurious, there are a plurality of means for generating mutually different frequencies, and a plurality of frequency dividing means are output by means for operating only one of them. Although there is a means for synthesizing, the present invention is a technical means for switching to one of two PLL outputs, and differs in that there is no concept of synthesizing.

2. JP, 5-191302, A Although this prior art is related to a radio transmitting device which can transmit two different frequencies simultaneously with one PLL, the present invention enables high-speed switching of frequencies with two PLLs. Related to a simple phase synchronizer.
Differs in effect. In this prior art, there is a means for synthesizing frequencies in order to obtain three different frequencies at the same time. However, the present invention is a technical means for switching to one of two PLL outputs, and there is no concept of synthesizing. Different.

3. This prior art relates to a small radio device that switches the operating state and non-operating state of a frequency divider during reception and transmission to reduce characteristic deterioration during reception. Even if the local oscillator is switched at high speed, the phase noise characteristic does not deteriorate due to interference.
They differ in configuration. Further, in this prior art, BP is used to suppress spurious (unwanted radiation) other than the transmission frequency.
F (band-pass filter) is used.
It avoids the occurrence of beat interference itself at the time of simultaneous oscillation of frequencies, and differs in the purpose and effect.

[0020]

In the phase synchronization device according to the first invention, a frequency which is 1 / M (M is an even number) times the output frequency of the RF switch circuit is generated, and odd harmonics are generated. 1V as frequency generating means with strong wave characteristics
A CO circuit, a first PLL circuit as a phase and frequency synchronization control means having an internal circuit having a first VCO circuit as the frequency generation means, a first VCO circuit as the frequency generation means, and the phase and frequency synchronization control means A first multiplying circuit connected to the first PLL circuit as a multiplying means for inputting a signal output from the first VCO circuit and converting the frequency of the input signal into a frequency M times higher. Accordingly, in a 2PLL fast switching frequency synthesizer circuit, even if two PLL circuits are installed in the same module, both VCO output signals do not cause beat interference, and as a result, a phase synchronizer that does not deteriorate the phase noise characteristic is provided. Obtainable.

In the phase synchronizer according to the second invention, in addition to the configuration of the first invention, a frequency that generates a frequency 1 / N (N is an odd number) times the output frequency of the RF switch circuit is added. A second PLL as a phase and frequency synchronization control means having a second VCO circuit as a generation means and a second VCO circuit as the frequency generation means in an internal circuit.
Circuit, a second VCO circuit as the frequency generation means, and a second PCO circuit as the phase and frequency synchronization control means.
A second multiplying circuit, which is connected to the LL circuit, receives a signal output from the second VCO circuit, and converts the frequency of the input signal to N times the frequency,
Thereby, in the 2PLL fast switching frequency synthesizer circuit, even if two PLL circuits are installed in the same module, both VCO output signals do not cause beat interference, and as a result, the phase noise characteristic does not deteriorate, and ,
The selectivity of the VCO that can be used in the 2PLL high-speed switching type frequency synthesizer circuit of the present invention is expanded, and a phase synchronizer excellent in versatility can be obtained.

In the phase synchronizer according to the third aspect of the present invention, the frequency generator generates a frequency M (M is an even number) times the output frequency of the RF switch circuit and has a strong odd harmonic characteristic. A first VCO circuit, and a first PLL circuit as a phase and frequency synchronization control means, having a first VCO circuit as the frequency generation means in an internal circuit;
A signal output from the first VCO circuit is connected to a first VCO circuit serving as the frequency generating means and a first PLL circuit serving as the phase and frequency synchronization control means, and the frequency of the input signal is divided by M A first frequency dividing circuit as frequency dividing means for converting the frequency to one-time frequency, a second VCO circuit as frequency generating means for generating an output frequency of the RF switch circuit, and a second VC as frequency generating means
And a second PLL circuit as a phase and frequency synchronization control means having an O circuit in the internal circuit,
In a 2PLL fast switching frequency synthesizer circuit, even if two PLL circuits are installed in the same module, both VCO output signals do not cause beat interference, and as a result, the phase noise characteristics do not deteriorate and the oscillation frequency increases. Therefore, it is possible to obtain a phase synchronizer that suppresses unnecessary harmonics radiated from the VCO circuit from affecting the output frequency of the RF switch circuit.

In the phase synchronizer according to the fourth invention, in addition to the configuration of the third invention, as a frequency generating means for generating a frequency N (N is an odd number) times the output frequency of the RF switch circuit. A second VCO circuit, a second PLL circuit as phase and frequency synchronization control means having an internal circuit as the frequency generation means, a second VCO circuit as the frequency generation means, and a second VCO circuit as the frequency generation means. The second frequency divider is connected to a second PLL circuit as a control means, receives a signal output from the second VCO circuit, and converts the frequency of the input signal to a frequency 1 / N times the second frequency division means. And a circuit,
Thereby, in the 2PLL fast switching frequency synthesizer circuit, even if two PLL circuits are installed in the same module, both VCO output signals do not cause beat interference, and as a result, the phase noise characteristic does not deteriorate, and ,
VCO circuit with high oscillation frequency can be selected.
It suppresses unnecessary harmonics radiated from the circuit from affecting the output frequency of the RF switch circuit. In addition, the selectivity of the VCO that can be used in the 2PLL high-speed switching type frequency synthesizer circuit of the present invention is widened and excellent in versatility. A phase synchronization device can be obtained.

In the phase synchronization device according to the fifth aspect, the output frequency of the RF switch circuit is reduced by a factor of 1 / M.
(M is an even number) A first VCO circuit as a frequency generating means having a frequency which is twice as high and having a strong odd harmonic characteristic, and a first VCO circuit as the frequency generating means is provided in an internal circuit. First PLL as control means
Circuit, a first VCO circuit as the frequency generation means, and a first PCO circuit as the phase and frequency synchronization control means.
A first multiplier circuit, which is connected to the LL circuit, receives a signal output from the first VCO circuit, and converts the frequency of the input signal to an M-fold frequency, and an output frequency of the RF switch circuit. A second VCO circuit as a frequency generation means for generating a frequency N times (N is an odd number), and a second PLL circuit as a phase and frequency synchronization control means, having a second VCO circuit as the frequency generation means in an internal circuit. And a second VC as the frequency generating means.
An O circuit and a second PLL circuit as the phase and frequency synchronization control means are connected, receive a signal output from the second VCO circuit, and convert the frequency of the input signal to 1 / N times the frequency. A second frequency dividing circuit as frequency dividing means, so that in a 2 PLL fast switching frequency synthesizer circuit, even if two PLL circuits are installed in the same module, both VCO output signals cause beat interference. As a result, the phase noise characteristics do not deteriorate, and the oscillation frequencies of the two VCO circuits can have a large difference. Therefore, unnecessary harmonics radiated from the VCO circuit are output frequency of the RF switch circuit. VCO circuits are not affected by each other while suppressing the influence of the 2PLL fast switching frequency synthesizer of the present invention. Spread VCO selectivity that can be used The circuit, it is possible to obtain an excellent phase synchronization apparatus in versatility.

The second VCO circuit as the frequency generating means has a strong even harmonic characteristic (here, even harmonic means high frequency noise that appears at an even multiple of the center frequency of the carrier). A strong even harmonic characteristic means a characteristic in which even harmonics are likely to appear and odd harmonics are unlikely to appear), and a VCO circuit is provided.

The multiplying means divides the input signal by M or N by an internal input section, and multiplies the two divided signals by M to multiply the input signal frequency by N or N. It is provided with a multiplication processing circuit for converting the frequency to a double frequency and outputting the converted frequency.

The frequency dividing means counts the frequency of the input signal and outputs one signal when the count reaches M or N, thereby dividing the frequency of the input signal by M. And a counter circuit for converting the frequency to 1 / N or 1 / N and outputting the converted frequency.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS As an embodiment of the phase synchronizer according to the present invention, a 2PLL fast switching frequency synthesizer circuit as described below will be described.

Embodiment 1 FIG. 1 shows the first embodiment.
FIG. 2 is a configuration diagram illustrating a 2PLL fast switching type frequency synthesizer circuit. In FIG. 1, reference numeral 10 denotes a 2PLL high-speed switching type frequency synthesizer circuit, and 11 denotes f1ou.
a first VCO circuit which generates a frequency signal of M times (M is an even number) of the frequency of t and outputs it as f1v1, 12 is a 1 PLL circuit which has the first VCO circuit in an internal circuit and performs phase and frequency synchronization control, 13 Is a second V that generates a frequency signal having the same frequency as f1out and outputs it as f1v1.
A CO circuit 14 is a second PLL circuit which has a first VCO circuit in an internal circuit and controls phase and frequency synchronization, and 15 is a signal which receives both f1mix1 and f1v2 signals and receives either one of them according to a control signal inputted from outside. , An RF switch circuit for selecting and outputting f1out, 16 a first multiplier circuit for inputting f1v1 and multiplying the frequency by M and outputting it as f1mix1, f1v1 an output signal of the first VCO circuit 11, and f1v2 a second VCO circuit 13
F1mix1 is the output signal of the first multiplying circuit 16, and f1out is the output signal of the RF switch circuit 15.

Next, the operation will be described. 1st VCO
The output signal f1v1 of the circuit 11 is converted into an M-fold frequency by the first multiplication circuit 16 and output as f1mix1. The output signal f1mix1 of the first multiplier 16 and the second V
The output signal f1v2 of the CO circuit 13 is the RF switch circuit 1
5, one of the signals is selected by a control signal input from the outside, and is output as f1out.

In the first embodiment, the first multiplication circuit 16
Is provided, the output signal f of the first VCO circuit 11
1v1 frequency and the output signal f1v of the second VCO circuit 13
The frequency of 2 can have a difference of 1 / M times.

With this operation, even when the first PLL circuit 12 and the second PLL circuit 14 oscillate at the same frequency at the same time, actually, the oscillation frequency of the first VCO circuit 11 in the first PLL circuit 12 and the internal frequency of the second PLL circuit 14 Second V of
The oscillation frequency of the CO circuit 13 has a frequency difference of 1 / M.

Thus, in the 2PLL high-speed switching type frequency synthesizer circuit 10, the first PLL circuit 12
Even if the second PLL circuit 14 and the second PLL circuit 14 are installed in the same module, it is possible to avoid the beat interference caused by the same frequency simultaneous oscillation of the VCO output signals in both PLLs. As a result, a 2PLL high-speed switching type frequency synthesizer 10 in which the phase noise characteristic is not deteriorated is obtained.

As the second VCO circuit 13, a VCO circuit having a strong even harmonic characteristic can be used.

As the first multiplication circuit 16, a multiplication processing circuit can be used.

Embodiment 2 The second embodiment is different from the first embodiment in that the second VCO generates a frequency 1 / N (N is an odd number) times the output frequency of the RF switch circuit.
A second PLL circuit having the second VCO circuit in an internal circuit and performing phase and frequency synchronization control;
A second VC connected to the VCO circuit and the second PLL circuit;
By using a second multiplier circuit for inputting the signal output from the O circuit and converting the frequency of the input signal to N times the frequency, the selectivity of the VCO which can be used in the 2PLL fast switching frequency synthesizer circuit of the present invention. This embodiment is further expanded and has excellent versatility.

FIG. 2 is a configuration diagram illustrating a 2PLL high-speed switching type frequency synthesizer circuit according to the second embodiment. In FIG. 2, reference numeral 20 denotes a 2PLL high-speed switching type frequency synthesizer circuit, and reference numeral 21 denotes an M2 having a frequency f2out.
A first VCO circuit that generates a 1 / times frequency signal and outputs it as f2v1, a first PLL circuit 22 that has the first VCO circuit in an internal circuit and performs phase and frequency synchronization control,
Reference numeral 23 denotes a second VCO circuit that generates a frequency signal that is 1 / N times the frequency of f2out and outputs the signal as f2v2, 24 denotes a second PLL circuit that uses the first VCO circuit as an internal circuit and performs phase-frequency synchronization control, and 25 denotes f2mix1. And f2mi
An RF switch circuit which inputs both signals of x2 and selects either one of the signals by an externally input control signal and outputs the signal as f2out, 26 is a first circuit which receives f2v1 and multiplies the frequency by M times and outputs it as f2mix1. The multiplication circuit 27 receives f2v2, increases the frequency by N times, and
a second multiplying circuit for output as mix2, f2v1 is the output signal of the first VCO circuit 21, and f2v2 is the second VCO.
The output signal of the CO circuit 23, f2mix1 is the output signal of the first multiplier circuit 26, f2mix2 is the output signal of the second multiplier circuit 27, and f2out is the RF switch circuit 2.
5 output signal.

Next, the operation will be described. 1st VCO
The output signal f2v1 of the circuit 21 is converted into an M-fold frequency by the first multiplication circuit 26 and output as f2mix1. The output signal f2v2 of the second VCO circuit 22 is converted into an N-fold frequency by the second multiplying circuit 27 and f2mix.
Output as 2. Output signal f2 of first multiplier circuit 26
mix1 and the output signal f2mix2 of the second multiplier 27
Are input to the RF switch circuit 25 and either one of them is selected by a control signal input from the outside, and is output as f2out.

In the second embodiment, the first multiplication circuit 26
And the second multiplier 27, the frequency of the output signal f2v1 of the first VCO circuit 21 and the second VCO circuit 2
3 can have a difference of N times the frequency M of the output signal f2v2.

With this operation, even when the first PLL circuit 22 and the second PLL circuit 24 oscillate at the same frequency simultaneously, actually, the oscillation frequency of the first VCO circuit 21 inside the first PLL circuit 22 and the internal frequency of the second PLL circuit 24 Second V of
The oscillation frequency of the CO circuit 23 has N times the frequency of M.

As a result, in the 2PLL fast switching type frequency synthesizer circuit 20, the first PLL circuit 22
Even if the second PLL circuit 24 and the second PLL circuit 24 are installed in the same module, beat interference caused by simultaneous oscillation of the VCO output signals in both PILLs at the same frequency can be avoided, and the selectivity of usable VCOs is further increased. As a result, the phase noise characteristic does not deteriorate, and the selectivity of usable VCOs is wide.
A 2PLL fast switching type frequency synthesizer circuit 20 is obtained.

Incidentally, as the second VCO circuit 23, a VCO circuit having strong characteristics at even harmonics can be used.

As the first multiplying circuit 26 and the second multiplying circuit 27, a multiplying circuit can be used.

Embodiment 3 FIG. Embodiment 3 is an embodiment in which the frequency multiplier in Embodiment 1 is replaced by a frequency divider. FIG. 3 is a configuration diagram illustrating a 2PLL fast switching frequency synthesizer circuit according to the third embodiment. In FIG. 3, reference numeral 30 denotes a 2PLL high-speed switching type frequency synthesizer circuit, and 31 denotes an M3 having a frequency of f3out.
A first VCO circuit that generates a frequency signal of (M is an even number) times and outputs it as f3v1, 32 is a first PLL that has the first VCO circuit in an internal circuit and performs phase and frequency synchronization control
A reference numeral 33 denotes a second VCO circuit which generates a frequency signal having the same frequency as f3out and outputs it as f3v3; a reference numeral 34 denotes a second PLL circuit which controls the phase and frequency of the first VCO circuit for an internal circuit; and a reference numeral 35 denotes f3div1 and f3v
RF switch circuit which inputs both signals of 2 and selects either one of them according to a control signal input from the outside and outputs it as f3out. 36 receives f3v1 and increases the frequency by a factor of M to output as f3div1. First
A frequency dividing circuit, f3v1 is an output signal of the first VCO circuit 31; f3v2 is an output signal of the second VCO circuit 33;
3div1 is the output signal of the first frequency divider 36, f3o
ut is the output signal of the RF switch circuit 35.

Next, the operation will be described. 1st VCO
The output signal f3v1 of the circuit 31 is converted into a frequency of 1 / M by the first frequency divider 36 and output as f3div1. The output signal f3div1 of the first frequency divider 36 and the output signal f3v2 of the second VCO circuit 33 are input to the RF switch circuit 35, and either one of them is selected by a control signal input from the outside and output as f3out. .

In the third embodiment, the first frequency divider 36
Is provided, the output signal f of the first VCO circuit 31
3v1 frequency and the output signal f3v of the second VCO circuit 33
The frequency of 2 can have an M-fold difference.

With this operation, even when the first PLL circuit 32 and the second PLL circuit 34 oscillate at the same frequency at the same time, actually, the oscillation frequency of the first VCO circuit 31 inside the first PLL circuit 32 and the internal frequency of the second PLL circuit 34 Second V of
The oscillation frequency of the CO circuit 33 has M times the frequency.

Thus, in the 2PLL high-speed switching type frequency synthesizer circuit 30, the first PLL circuit 32
Even if the second PLL circuit 34 and the second PLL circuit 34 are installed in the same module, beat interference caused by simultaneous oscillation of the VCO output signals in both PILLs at the same frequency can be avoided. As a result, the phase noise characteristic is not deteriorated. High VCO
Since a circuit can be selected, a 2PLL high-speed switching frequency synthesizer circuit 30 that suppresses unnecessary harmonics radiated from the VCO circuit from affecting the output frequency of the RF switch circuit is obtained.

As the second VCO circuit 33, a VCO circuit having strong even harmonic characteristics can be used.

A counter circuit can be used as the first frequency dividing circuit 36.

Embodiment 4 FIG. In the fourth embodiment, in addition to the third embodiment, a second VCO circuit that generates a frequency N (N is an odd number) times the output frequency of the RF switch circuit, and the second VCO circuit has A second PLL circuit for performing synchronization control of frequency and frequency;
By using a second frequency divider circuit that is connected to the O circuit and the second PLL circuit, receives a signal output from the second VCO circuit, and converts the frequency of the input signal to 1 / N times the frequency, This is an embodiment in which the selectivity of the VCO that can be used for the 2PLL high-speed switching type frequency synthesizer circuit of the present invention is further expanded and the versatility is excellent.

FIG. 4 is a block diagram illustrating a 2PLL high-speed switching type frequency synthesizer circuit according to the fourth embodiment. In FIG. 4, reference numeral 40 denotes a 2PLL high-speed switching type frequency synthesizer circuit, and 41 denotes an M of the frequency of f4out.
1st V that generates double frequency signal and outputs it as f4v1
A CO circuit, 42 is a first PLL circuit which has a first VCO circuit in an internal circuit and performs phase and frequency synchronization control, and 43 generates a frequency signal N times the frequency of f4out and f4v
A second VCO circuit 44 for outputting as 2; a second PLL circuit 44 having the first VCO circuit in an internal circuit to perform phase and frequency synchronization control; and 45 receiving both signals of f4div1 and f4div2 and receiving a control signal from the outside. An RF switch circuit that selects one of the signals and outputs it as f4out, 46 is a first frequency divider that inputs f4v1 and multiplies the frequency by 1 / M and outputs it as f4div1, and 47 receives f4v2 and inputs a frequency of N A second frequency divider circuit which outputs the signal as f4div2 by dividing by 1 / f
Is the output signal of the first VCO circuit 41, f4v2 is the output signal of the second VCO circuit 43, f4div1 is the output signal of the first frequency dividing circuit 46, f4div2 is the output signal of the second frequency dividing circuit 47, and f4out is the An output signal of the RF switch circuit 35.

Next, the operation will be described. 1st VCO
The output signal f4v1 of the circuit 41 is converted into a frequency of 1 / M by the first frequency divider 46 and output as f4div1. The output signal f4v2 of the second VCO circuit 42 is converted into a frequency of 1 / N by the first frequency divider 47 and output as f4div2. The output signal f4div1 of the first frequency divider 46 and the output signal f4 of the second frequency divider 47
div2 is input to the RF switch circuit 45, and either one of the signals is selected by a control signal input from the outside, and output as f4out.

In the fourth embodiment, the first frequency divider 46
And the second frequency dividing circuit 47, the frequency of the output signal f4v1 of the first VCO circuit 41 and the second VCO circuit 4
The frequency of the output signal f4v2 of No. 3 can have a difference M times N times.

With this operation, even when the first PLL circuit 42 and the second PLL circuit 44 oscillate at the same frequency at the same time, actually, the oscillation frequency of the first VCO circuit 41 in the first PLL circuit 42 and the internal frequency of the second PLL circuit 44 Second V of
The oscillation frequency of the CO circuit 43 has a frequency which is M times N times.

Thus, in the 2PLL high-speed switching type frequency synthesizer circuit 40, the first PLL circuit 42
Even if the second PLL circuit 44 and the second PLL circuit 44 are installed in the same module, it is possible to avoid beat interference caused by simultaneous oscillation of the VCO output signals in both PILLs at the same frequency, and further increase the selectivity of usable VCOs. As a result, the phase noise characteristic is not degraded, and the selectivity of usable VCOs is wide and a VCO circuit having a high oscillation frequency can be selected.
A 2PLL high-speed switching frequency synthesizer circuit that suppresses unnecessary harmonics radiated from the CO circuit from affecting the output frequency of the RF switch circuit is obtained.

As the second VCO circuit 43, a VCO circuit having strong even harmonic characteristics can be used.

As the first frequency dividing circuit 46 and the second frequency dividing circuit 47, counter circuits can be used.

Embodiment 5 FIG. In the fifth embodiment, in addition to the first embodiment, a second VCO circuit that generates a frequency N (N is an odd number) times the output frequency of the RF switch circuit, and the second VCO circuit has A second PLL circuit for performing synchronization control of frequency and frequency;
By using a second frequency divider circuit that is connected to the O circuit and the second PLL circuit and that receives a signal output from the second VCO circuit and converts the frequency of the input signal to 1 / N times the frequency, Since the oscillation frequencies of the two VCO circuits can have a large difference, the unnecessary harmonics radiated from the VCO circuit can be prevented from affecting the output frequency of the RF switch circuit, and the VCO circuits can influence each other. In addition, in addition, the embodiment of the present invention is excellent in versatility because the selectivity of the VCO that can be used in the 2PLL high-speed switching type frequency synthesizer circuit of the present invention is further expanded.

FIG. 5 is a block diagram illustrating a 2PLL high-speed switching type frequency synthesizer circuit according to the fourth embodiment. In FIG. 5, reference numeral 50 denotes a 2PLL high-speed switching type frequency synthesizer circuit; 51, a first VCO circuit that generates a frequency signal that is 1 / M times the frequency of f5out and outputs it as f5v1; And a first PLL circuit for performing frequency synchronization control, 5
3 generates a frequency signal of N times the frequency of f5out and f
The second VCO circuit outputting as 5v2, 54 is the first VC
A second PLL circuit which has an O circuit in its internal circuit and performs phase and frequency synchronization control, and 55 is f5mix1 and f5div.
An RF switch circuit which inputs both signals of 2 and selects either one of the signals by an externally input control signal and outputs it as f5out, and 56 receives f5v1 and multiplies the frequency by M times and outputs it as f5mix1. A multiplying circuit, 57 is a second frequency dividing circuit that inputs f5v2, multiplies the frequency by 1 / N and outputs it as f5div2, f5v1 is an output signal of the first VCO circuit 51, f5v2 is an output signal of the second VCO circuit 53, f5mixv1 is an output signal of the first frequency multiplier 56, f5div2 is an output signal of the second frequency divider 57, and f5out is an output signal of the RF switch circuit 55.

Next, the operation will be described. 1st VCO
The output signal f5v1 of the circuit 51 is converted into an M-fold frequency by the first multiplier 56 and output as f5mix1. The output signal f5v2 of the second VCO circuit 52 is converted into a frequency 1 / N by the second frequency dividing circuit 57 and f5d
Output as iv2. Output signal f5mix1 of first frequency divider 56 and output signal f5div of second frequency divider 57
2 is input to the RF switch circuit 55, one of the signals is selected by a control signal input from the outside, and output as f5out.

In the fifth embodiment, the first multiplication circuit 56
And the second frequency divider 57, the frequency of the output signal f5v1 of the first VCO circuit 51 and the second VCO circuit 5
3 can have a difference of MN times in the frequency of the output signal f5v2.

By this operation, even when the first PLL circuit 52 and the second PLL circuit 54 oscillate at the same frequency at the same time, actually, the oscillation frequency of the first VCO circuit 51 inside the first PLL circuit 52 and the internal frequency of the second PLL circuit 54 Second V of
The oscillation frequency of the CO circuit 53 has MN times the frequency.

Thus, in the 2PLL fast switching frequency synthesizer circuit 50, the first PLL circuit 52
Even if the second PLL circuit 54 and the second PLL circuit 54 are installed in the same module, beat interference caused by the same frequency simultaneous oscillation of the VCO output signals in both PLLs can be avoided.
A large difference can be provided in the oscillation frequency of the CO circuit. As a result, the phase noise characteristics are not degraded, and the oscillation frequencies of the two VCO circuits can have a large difference.
While suppressing the influence on the output frequency of the F switch circuit, the VCO circuits are not affected by each other, and in addition, the 2PLL fast switching frequency synthesizer circuit 2PLL fast switching frequency VC according to the present invention can be used.
A 2PLL high-speed switching type frequency synthesizer circuit 50 having a wide selection of O and excellent versatility is obtained.

As the second VCO circuit 53, a VCO circuit having a strong even harmonic characteristic can be used.

As the first multiplication circuit 56, a multiplication processing circuit can be used.

As the second frequency dividing circuit 57, a counter circuit can be used.

[0068]

Since the present invention is configured as described above, it has the following effects.

According to the first aspect of the present invention, a frequency generating means that generates a frequency 1 / M (M is an even number) times the output frequency of the RF switch circuit and has a strong odd harmonic characteristic. A first VCO circuit, a first PLL circuit as a phase and frequency synchronization control means having an internal circuit with a first VCO circuit as the frequency generation means, a first VCO circuit as the frequency generation means, and the phase and frequency synchronization control Connected to a first PLL circuit as means,
A first multiplying circuit as a multiplying means for inputting a signal output from the VCO circuit and converting the frequency of the input signal into an M-fold frequency, whereby a 2PLL fast switching frequency synthesizer circuit comprises: Two PL
Even if the L circuit is installed in the same module, both VCOs
It is possible to obtain a phase synchronizer in which the output signal does not cause beat interference and as a result, the phase noise characteristic does not deteriorate.

According to the second aspect, the phase synchronizer is configured so that the output frequency of the RF switch circuit is reduced by a factor of N.
A second VCO circuit as frequency generating means for generating a frequency (N is an odd number) times, a second PLL circuit as phase and frequency synchronization control means having a second VCO circuit as the frequency generating means in an internal circuit, A second VCO circuit as frequency generating means, and a second PLL circuit as phase and frequency synchronization control means,
A second multiplying circuit as a multiplying means for inputting a signal output from the VCO circuit and converting the frequency of the input signal into an N-fold frequency, whereby a 2PLL fast switching frequency synthesizer circuit comprises: Two PL
Even if the L circuit is installed in the same module, both VCOs
The output signal does not cause beat interference, and as a result, the phase noise characteristic does not deteriorate. Further, the selectivity of the VCO that can be used in the 2PLL high-speed switching type frequency synthesizer circuit of the present invention is widened and the phase synchronizer excellent in versatility is provided. Can be obtained.

According to the third aspect, the phase synchronizer generates a frequency that is M times (M is an even number) times the output frequency of the RF switch circuit, and generates a frequency having strong odd harmonic characteristics. A first VCO circuit as a means, a first PLL circuit as a phase and frequency synchronization control means having an internal circuit with a first VCO circuit as the frequency generation means,
A signal output from the first VCO circuit is connected to a first VCO circuit serving as the frequency generating means and a first PLL circuit serving as the phase and frequency synchronization control means, and the frequency of the input signal is divided by M A first frequency dividing circuit as frequency dividing means for converting the frequency to one-time frequency, a second VCO circuit as frequency generating means for generating an output frequency of the RF switch circuit, and a second VC as frequency generating means
A phase and frequency synchronization control means having an O circuit in the internal circuit, and a second PLL circuit.
In a fast switching frequency synthesizer circuit, even if two PLL circuits are installed in the same module, both VCO output signals do not cause beat interference, and as a result, the phase noise characteristics do not deteriorate and the oscillation frequency is higher. VCO
Since a circuit can be selected, it is possible to obtain a phase synchronizer that suppresses unnecessary harmonics radiated from the VCO circuit from affecting the output frequency of the RF switch circuit.

According to the fourth invention, the phase synchronizer includes a second frequency generation means for generating a frequency N (N is an odd number) times the output frequency of the RF switch circuit.
A VCO circuit and a second VCO as the frequency generating means.
A second PLL circuit as a phase and frequency synchronization control means having a circuit in an internal circuit, a second VCO circuit as the frequency generation means, and a second PLL circuit as the phase and frequency synchronization control means, A second frequency dividing circuit as frequency dividing means for inputting a signal output from the circuit and converting the frequency of the input signal to a frequency 1 / N, thereby providing a 2PLL high-speed switching type frequency. In a synthesizer circuit, two PLLs
Even if the circuit is installed in the same module, both VCO output signals do not cause beat interference, and as a result, the phase noise characteristic does not deteriorate, and a VCO circuit with a high oscillation frequency can be selected. It suppresses the radiated unnecessary harmonics from affecting the output frequency of the RF switch circuit. In addition, the selectivity of the VCO that can be used in the 2PLL high-speed switching type frequency synthesizer circuit of the present invention is widened and the phase is excellent in versatility. A synchronization device can be obtained.

According to the fifth aspect, the phase synchronizer is configured to reduce the output frequency of the RF switch circuit by 1 / M.
(M is an even number) A first VCO circuit as a frequency generating means having a frequency which is twice as high and having a strong odd harmonic characteristic, and a first VCO circuit as the frequency generating means is provided in an internal circuit. First PLL as control means
Circuit, a first VCO circuit as the frequency generation means, and a first PCO circuit as the phase and frequency synchronization control means.
A first multiplier circuit, which is connected to the LL circuit, receives a signal output from the first VCO circuit, and converts the frequency of the input signal to an M-fold frequency, and an output frequency of the RF switch circuit. A second VCO circuit as a frequency generation means for generating a frequency N times (N is an odd number), and a second PLL circuit as a phase and frequency synchronization control means, having a second VCO circuit as the frequency generation means in an internal circuit. And a second VC as the frequency generating means.
An O circuit and a second PLL circuit as the phase and frequency synchronization control means are connected, receive a signal output from the second VCO circuit, and convert the frequency of the input signal to 1 / N times the frequency. A second frequency dividing circuit as frequency dividing means, whereby in a 2 PLL fast switching frequency synthesizer circuit, even if two PLL circuits are installed in the same module, both VCO output signals cause beat interference. As a result, the phase noise characteristics do not deteriorate, and the oscillation frequencies of the two VCO circuits can have a large difference. Therefore, unnecessary harmonics radiated from the VCO circuit are output frequency of the RF switch circuit. VCOs are not affected by each other while suppressing the influence on the frequency synthesizer. Spread VCO selectivity that can be used for the road, it is possible to obtain an excellent phase synchronization apparatus in versatility.

According to the sixth aspect of the present invention, the second VCO circuit as the frequency generating means has strong even harmonic characteristics (here, the even harmonic is a frequency which is an even multiple of the center frequency of the carrier). Represents the harmonic noise that appears at
A strong even harmonic characteristic means a characteristic in which even harmonics are likely to appear and odd harmonics are unlikely to appear), and by providing a VCO circuit, it is possible to obtain a phase synchronizer having further excellent phase noise characteristics. be able to.

According to the seventh aspect, the multiplying means divides the input signal into M or N by an internal input unit, and performs a multiplication process on the two divided signals to obtain an input signal. It is possible to obtain a phase synchronizer having a multiplication processing circuit for converting the frequency to M times or N times the frequency and outputting the converted frequency, and having excellent phase noise characteristics.

According to the eighth aspect, the frequency dividing means counts the cycle of the input signal, and the count is M,
Or a counter circuit that outputs one signal when it becomes N, converts the input signal frequency to 1 / M or 1 / N of the input signal frequency, and outputs the converted signal.
A phase synchronization device having excellent phase noise characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a 2PLL fast switching frequency synthesizer circuit according to Embodiment 1 of the present invention.

FIG. 2 is a configuration diagram of a 2PLL fast switching frequency synthesizer circuit according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a 2PLL fast switching frequency synthesizer circuit according to Embodiment 3 of the present invention.

FIG. 4 is a configuration diagram of a 2PLL high-speed switching type frequency synthesizer circuit according to a fourth embodiment of the present invention.

FIG. 5 is a configuration diagram of a 2PLL fast switching type frequency synthesizer circuit according to a fifth embodiment of the present invention.

FIG. 6 is a configuration diagram of a conventional 2PLL frequency synthesizer circuit.

FIG. 7 is a configuration diagram of a general PLL circuit.

[Explanation of symbols]

10, 20, 30, 40, 50 2PLL fast switching frequency synthesizer circuit, 602PLL frequency synthesizer circuit, 11, 13, 21, 23, 31, 33,
41, 43, 51, 53, 61, 62, 70 PLL circuit, 15, 25, 35, 45, 55, 63 RF switch, 16, 26, 27, 56 multiplier circuit, 37, 46,
47, 57 frequency divider circuit, 71 crystal oscillator, 72 reference frequency divider, 73 comparison frequency divider, 74 phase comparator, 75
Charge pump, 76 low pass filter (LPF),
77 voltage controlled oscillator (VCO), f1v1, f1v
2, f2v1, f2v2, f3v1, f3v2, f4v
1, f4v2, f5v1, f5v2, f6v1, f6v
2 PLL circuit output signal, f1out, f2out, f
3out, f4out, f5out, f6out RF
Switch circuit output signal, f1mix1, f2mix1,
f2mix2, f5mix1 Multiplier circuit output signal, f3
div1, f4div1, f4div2, f5div2
Frequency divider output signal, fa Low-pass filter (LP
F) Output signal, fx crystal oscillator output signal, fr reference divider output signal, fp comparison divider output signal, fu, f
d Phase comparator output signal, fc charge pump output signal, fv voltage controlled oscillator (VCO) output signal.

Claims (8)

[Claims] 1. A first VCO circuit as a frequency generating means which generates a frequency 1 / M (M is an even number) times the output frequency of an RF switch circuit and has strong odd harmonic characteristics, A first VCO circuit as the frequency generation means in an internal circuit, and a first PCO circuit as a phase and frequency synchronization control means.
An LL circuit, a first VCO circuit as the frequency generation unit, and a first PLL circuit as a phase and frequency synchronization control unit, which input a signal output from the first VCO circuit,
A first multiplying circuit as a multiplying means for converting the frequency of the input signal into an M-fold frequency; a second VCO circuit as a frequency generating means for generating an output frequency of the RF switch circuit; A phase and frequency synchronization control unit having a 2VCO circuit in an internal circuit, a second PLL circuit, an output signal of a first multiplier circuit as the multiplier, and an output signal of a second VCO circuit as the frequency generator.
And an RF switch circuit as frequency switching means for receiving two output signals, selecting one of the two signals, and outputting the selected signal. 2. A second VCO circuit as a frequency generating means for generating a frequency which is 1 / N (N is an odd number) times the output frequency of the RF switch circuit, and a second VCO circuit as the frequency generating means. Second P as phase and frequency synchronization control means of the circuit
An LL circuit, a second VCO circuit as the frequency generating means, and a second PLL circuit as a phase and frequency synchronization control means, which input a signal output from the second VCO circuit,
A second multiplying circuit as multiplying means for converting the frequency of the input signal into N times the frequency, an output signal of a first multiplying circuit as the multiplying means, and an output signal of a second multiplying circuit as the multiplying means 2. The phase synchronizer according to claim 1, further comprising: an RF switch circuit as frequency switching means for inputting two output signals, selecting one of the two signals, and outputting the selected signal. 3. A first VCO circuit as frequency generating means, which generates a frequency M (M is an even number) times the output frequency of the RF switch circuit and has a strong odd harmonic characteristic, Having a first VCO circuit in the internal circuit as a means, and a first PCO as a phase and frequency synchronization control means.
An LL circuit, a first VCO circuit as the frequency generation means, and a first PLL circuit as the phase and frequency synchronization control means, which input a signal output from the first VCO circuit, A first frequency dividing circuit as frequency dividing means for converting the frequency into a frequency of 1 / M, a second VCO circuit as frequency generating means for generating an output frequency of the RF switch circuit, and a second VCO as frequency generating means 2nd P as phase and frequency synchronization control means having circuit in internal circuit
An LL circuit; an output signal of a first frequency divider as the frequency divider; and an output signal of a second VCO circuit as the frequency generator.
And an RF switch circuit as frequency switching means for receiving two output signals, selecting one of the two signals, and outputting the selected signal. 4. An internal circuit comprising: a second VCO circuit as a frequency generating means for generating a frequency N (N is an odd number) times the output frequency of the RF switch circuit; and a second VCO circuit as the frequency generating means. , The second P as the phase and frequency synchronization control means
An LL circuit, a second VCO circuit as the frequency generating means, and a second PLL circuit as the phase and frequency synchronization control means, which input a signal output from the second VCO circuit and input a frequency of the input signal. A second frequency dividing circuit as frequency dividing means for converting the frequency to 1 / N times, an output signal of the first frequency dividing circuit as the frequency dividing means, and a second frequency dividing circuit as the frequency dividing means 4. The phase synchronization according to claim 3, further comprising: an RF switch circuit serving as frequency switching means for inputting two output signals of the output signals, selecting one of the two signals, and outputting the selected signal. apparatus. 5. An internal circuit comprising: a second VCO circuit as frequency generating means for generating a frequency N (N is an odd number) times the output frequency of the RF switch circuit; and a second VCO circuit as said frequency generating means. , The second P as the phase and frequency synchronization control means
An LL circuit, a second VCO circuit as the frequency generating means, and a second PLL circuit as a phase and frequency synchronization control means, which inputs a signal output from the second VCO circuit, A second frequency divider as frequency dividing means for converting the frequency to a frequency of 1 / N; an output signal of the first frequency multiplier as the frequency multiplier; and a second frequency divider as the frequency divider. 2. The phase synchronizer according to claim 1, further comprising: an RF switch circuit serving as frequency switching means for inputting two output signals of the output signals, selecting one of the two signals, and outputting the selected signal. . 6. A second VCO as said frequency generating means
The phase synchronization device according to claim 1, wherein the circuit includes a VCO circuit having strong even harmonic characteristics. 7. The phase synchronizer according to claim 1, wherein said multiplying means includes a multiplication processing circuit. 8. The phase synchronization device according to claim 3, wherein said frequency dividing means includes a counter circuit.