JPH1169785A - Power supply circuit - Google Patents

Power supply circuit

Info

Publication number
JPH1169785A
JPH1169785A JP9230676A JP23067697A JPH1169785A JP H1169785 A JPH1169785 A JP H1169785A JP 9230676 A JP9230676 A JP 9230676A JP 23067697 A JP23067697 A JP 23067697A JP H1169785 A JPH1169785 A JP H1169785A
Authority
JP
Japan
Prior art keywords
circuit
voltage
reference voltage
time
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9230676A
Other languages
Japanese (ja)
Inventor
Shinji Suzuki
慎二 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9230676A priority Critical patent/JPH1169785A/en
Publication of JPH1169785A publication Critical patent/JPH1169785A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Receiver Circuits (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Protection Of Static Devices (AREA)
  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a power factor improved power supply, which can prevent the generation of excessive output voltage at the time of power input or instantaneous stop. SOLUTION: This circuit is provided with a reference voltage increase circuit 15 which increases reference voltage 16 connected to a voltage error amplifying circuit 12 gradually, at the time of power input or after returning from instantaneous stop, and a reset circuit 22 which sets the output voltage of the reference voltage increase circuit 15 to zero at the time of instantaneous stop. For the reference voltage to rise gradually at the time of power input or after returning from instantaneous stop, the output voltage is also raised gradually. By setting the rising time constant C2.R4 of the reference voltage to be larger than the time constants C1.R3 of the feedback cut-off frequency of the output voltage, it is possible to prevent the generation of excessive voltage.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、カラーテレビ受信
機、カラーディスプレイ装置等の電源回路に関するもの
で、特に、電源投入時、及び瞬停時の出力電圧の過電圧
を防止する力率改善電源回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit for a color television receiver, a color display device and the like, and more particularly, to a power factor correction power supply circuit for preventing an overvoltage of an output voltage at the time of turning on the power and at the time of a momentary power failure. It is about.

【0002】[0002]

【従来の技術】従来、力率改善電源は、チョッパー回路
に、出力電圧と基準電圧を比較する電圧誤差増幅回路
と、前記誤差増幅回路の出力と入力半波整流電圧との乗
算出力と入力電流を比較する電流誤差増幅回路を設け、
電流誤差増幅回路の出力によりスイッチング素子のオン
/オフ期間を制御し入力電流を入力半波整流電圧と相似
にすることで力率をほぼ1に保つようにしていた。この
ような公知例は特開平7−87744号公報に述べられ
ている。
2. Description of the Related Art Conventionally, a power factor improving power supply is provided in a chopper circuit with a voltage error amplifier circuit for comparing an output voltage and a reference voltage, a multiplied output of the error amplifier circuit and an input half-wave rectified voltage, and an input current. A current error amplifier circuit for comparing
The on / off period of the switching element is controlled by the output of the current error amplifier circuit, and the input current is made similar to the input half-wave rectified voltage so that the power factor is maintained at approximately 1. Such a known example is described in JP-A-7-87744.

【0003】[0003]

【発明が解決しようとする課題】上記従来技術は、出力
電圧フィードッバク電圧のカットオフ周波数を高くする
と力率改善効果がなくなるため10(Hz)以下と低い
周波数にする必要があり、電源投入時、及び瞬停時の出
力電圧の立上り収束が遅く、過電圧が発生することが有
る。
In the above prior art, when the cutoff frequency of the output voltage feedback voltage is increased, the effect of improving the power factor is lost, so that the frequency needs to be as low as 10 (Hz) or less. Also, the rise and convergence of the output voltage at the time of a momentary power failure are slow, and an overvoltage may occur.

【0004】本発明の目的は、電源投入時、及び瞬停時
の過電圧を防止する力率改善電源を提供することであ
る。
[0004] It is an object of the present invention to provide a power factor correction power supply which prevents overvoltage at power-on and momentary power failure.

【0005】[0005]

【課題を解決するための手段】上記目的を、達成するた
めに本発明においては、電圧誤差増幅回路に接続されて
いる基準電圧の値を、電源投入時及び瞬停復帰後、徐々
に上昇させる回路を設けるとともに、瞬停時に電圧誤差
増幅回路に接続されている基準電圧の値を0にするリセ
ット回路設け、出力電圧の過電圧を防止するようにした
ものである。
In order to achieve the above object, according to the present invention, the value of a reference voltage connected to a voltage error amplifier circuit is gradually increased at the time of power-on and after recovery from a momentary power failure. In addition to the provision of a circuit, a reset circuit for setting the value of the reference voltage connected to the voltage error amplifier circuit to 0 at the time of a momentary power failure is provided to prevent an overvoltage of the output voltage.

【0006】電源投入時及び瞬停復帰後、基準電圧が徐
々に上昇していくため出力電圧も徐々に上昇する。基準
電圧の上昇時定数を、出力電圧のフィードバックカット
オフ周波数の時定数より大きくすれば過電圧を防止でき
る。
[0006] When the power is turned on and after the recovery from the momentary power failure, the reference voltage gradually increases, so that the output voltage also gradually increases. Overvoltage can be prevented by setting the rising time constant of the reference voltage larger than the time constant of the feedback cutoff frequency of the output voltage.

【0007】[0007]

【発明の実施の形態】以下、本発明の実施例を図1、図
2により説明する。図1は、本発明の一実施例を示す回
路図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a circuit diagram showing one embodiment of the present invention.

【0008】図1において、スイッチ2をオンすると交
流電源1をブリッジダイオード3にて全波整流された電
圧が、チョッパーコイル4、スイッチングFET5、ス
イッチングダイオード6、平滑コンデンサ7からなるチ
ョッパー回路に入力されその出力が負荷21に供給され
る。出力電圧Eoの分圧回路13による分圧値Eo・R2
/(R1+R2)と基準電圧16 の電圧値Erを電圧誤
差増幅回路12で比較し、出力電圧Eoの分圧値の方が高
ければ電圧誤差増幅回路6の出力はチョッパ回路の出力
電圧Eoを下げ、出力電圧Eoの分圧値の方が低ければ
電圧誤差増幅回路6の出力はチョッパ回路の出力電圧E
oを上げるよう作用する。よって負荷21に供給される出
力電圧EoはEr・(R1+R2)/R2となる。
In FIG. 1, when a switch 2 is turned on, a voltage obtained by full-wave rectification of an AC power supply 1 by a bridge diode 3 is input to a chopper circuit including a chopper coil 4, a switching FET 5, a switching diode 6, and a smoothing capacitor 7. The output is supplied to the load 21. Divided value Eo · R2 of output voltage Eo by voltage dividing circuit 13
/ (R1 + R2) and the voltage value Er of the reference voltage 16 are compared by the voltage error amplifier circuit 12. If the divided value of the output voltage Eo is higher, the output of the voltage error amplifier circuit 6 lowers the output voltage Eo of the chopper circuit. If the divided value of the output voltage Eo is lower, the output of the voltage error amplifier circuit 6 is equal to the output voltage E of the chopper circuit.
Acts to raise o. Therefore, the output voltage Eo supplied to the load 21 is Er · (R1 + R2) / R2.

【0009】また、入力電流を入力半波整流電圧と相似
にし力率を1に近づけるために、電圧誤差増幅回路12の
出力と入力半波整流電圧を乗算回路11にて乗算し、乗算
回路11の出力と入力電流を検出抵抗8で検出した電圧
とを電流誤差増幅回路10で比較し、電流誤差増幅回路
10の出力をオン/オフ回路9に入力しスイッチングF
ET5のオン/オフ比の制御を行なう。
Further, in order to make the input current similar to the input half-wave rectified voltage and to bring the power factor close to 1, the output of the voltage error amplifier circuit 12 and the input half-wave rectified voltage are multiplied by the multiplication circuit 11, and the multiplication circuit 11 The output of the current error amplifier circuit 10 is compared with the voltage detected by the detection resistor 8 and the output of the current error amplifier circuit 10 is input to the on / off circuit 9 and the switching F
Controls the on / off ratio of ET5.

【0010】スイッチ2をオンした直後は基準電圧上昇
回路15により電圧誤差増幅回路12に入力される電圧E2
は0であるため出力電圧Eoも0である。その後電圧誤
差増幅回路12に入力される基準電圧E2が徐々に上昇し
て最終的にErとなり出力電圧もEr・(R1+R2)
/R2となる。このときフィードバックカットオフ周波
数回路14の時定数C1・R3より基準電圧上昇回路1
5の時定数C2・R4を大きくすると過電圧が発生しな
い。
Immediately after the switch 2 is turned on, the voltage E2 inputted to the voltage error amplifier circuit 12 by the reference voltage raising circuit 15
Is 0, the output voltage Eo is also 0. Thereafter, the reference voltage E2 input to the voltage error amplifier circuit 12 gradually increases and finally becomes Er, and the output voltage also becomes Er · (R1 + R2).
/ R2. At this time, the reference voltage raising circuit 1 is obtained from the time constant C1 · R3 of the feedback cutoff frequency circuit 14.
When the time constant C2 · R4 of 5 is increased, no overvoltage occurs.

【0011】瞬停時は、整流ダイオード17、平滑コン
デンサ18からなる整流平滑回路の出力E1が0となる
ためバイアス回路20がトランジスタ19をオンさせ基
準電圧上昇回路15のコンデンサC2を放電させる。瞬
停復帰後、電圧E1が上昇しバイアス回路20がトラン
ジスタ19をカットオフするため電圧誤差増幅回路12に
入力される基準電圧E2が徐々に上昇する。
During an instantaneous interruption, the output E1 of the rectifying and smoothing circuit comprising the rectifying diode 17 and the smoothing capacitor 18 becomes 0, so that the bias circuit 20 turns on the transistor 19 and discharges the capacitor C2 of the reference voltage raising circuit 15. After the recovery from the momentary power failure, the voltage E1 rises and the bias circuit 20 cuts off the transistor 19, so that the reference voltage E2 input to the voltage error amplifier circuit 12 gradually rises.

【0012】図2は、図1の回路におけるvin,E
1,E2,Eoの電源投入時及び瞬停時の過度応答を示
すグラフである。図2において時間toでスイッチ2が
オンとなり、時間t1からt2の期間瞬停となる。Eo
のグラフで波線で示された部分は、本発明による電源投
入時及び瞬停復帰後、電圧誤差増幅回路12に入力される
基準電圧E2が徐々に上昇する回路がないときのグラフ
であり過電圧が発生することを示す。
FIG. 2 shows vin, E in the circuit of FIG.
It is a graph which shows the transient response at the time of power-on of 1, E2, and Eo and at the time of a momentary power failure. In FIG. 2, the switch 2 is turned on at time to, and there is an instantaneous blackout during the period from time t1 to t2. Eo
The graph indicated by the dashed line is a graph when the reference voltage E2 input to the voltage error amplifier circuit 12 does not gradually increase when the power is turned on and after the recovery from the momentary power failure according to the present invention. Indicates that it will occur.

【0013】[0013]

【発明の効果】本発明によれば、フィードバックカット
オフ周波数が低い力率改善電源において電源投入時及び
瞬停時の出力電圧の過電圧を防止でき、負荷を過電圧か
ら保護できる。
According to the present invention, in a power factor improving power supply having a low feedback cut-off frequency, an overvoltage of an output voltage at the time of power-on and at a momentary power failure can be prevented, and a load can be protected from overvoltage.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例を示す回路図である。FIG. 1 is a circuit diagram showing an embodiment of the present invention.

【図2】図1の回路におけるvin,E1,E2,Eo
の電源投入時及び瞬停時の過度応答を示すグラフであ
る。
FIG. 2 shows vin, E1, E2 and Eo in the circuit of FIG.
6 is a graph showing transient response at power-on and momentary power failure.

【符号の説明】[Explanation of symbols]

1…交流電源、 2…スイッチ、 3…ブリッジダイ
オード、4…チョッパーコイル、 5…スイッチングF
ET、6…スイッチングダイオード、 7…平滑コ
ンデンサ、 8…検出抵抗、9…オン/オフ回路、 1
0…電流誤差増幅回路、 11…乗算回路、12
…電圧誤差増幅回路、13…分圧回路、14…フィード
バックカットオフ周波数回路、 15…基準電圧上昇
回路、16…基準電圧、 17…整流ダイオー
ド、18…平滑コンデンサ、19…トランジスタ、
20…バイアス回路、 21…負荷、22…リセット回
路。
1: AC power supply, 2: Switch, 3: Bridge diode, 4: Chopper coil, 5: Switching F
ET, 6: switching diode, 7: smoothing capacitor, 8: detection resistor, 9: on / off circuit, 1
0: current error amplifier circuit, 11: multiplier circuit, 12
... voltage error amplifier circuit, 13 ... voltage divider circuit, 14 ... feedback cutoff frequency circuit, 15 ... reference voltage rise circuit, 16 ... reference voltage, 17 ... rectifier diode, 18 ... smoothing capacitor, 19 ... transistor,
20: bias circuit, 21: load, 22: reset circuit.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 FI H04N 5/63 H04N 5/63 A ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 6 Identification code FI H04N 5/63 H04N 5/63 A

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】商用交流電源を整流平滑した電圧を入力と
するチョッパー回路であり、前記チョッパー回路の出力
電圧を一定値に分圧した電圧を誤差増幅回路の一方へ入
力し、他方へ基準電圧を入力し、該基準電圧の一定値倍
に出力電圧を制御するチョッパー回路において、前期誤
差増幅器に加わる前記基準電圧を電源投入後、徐々に上
昇させる積分回路を前期誤差増幅器と前記基準電圧基準
の間に設け、前記チョッパー回路の入力とは別に整流平
滑した電圧を検出し積分回路の出力を商用交流電源が瞬
停したとき放電するリセット回路を設けたことを特徴と
する電源回路。
1. A chopper circuit for inputting a voltage obtained by rectifying and smoothing a commercial AC power supply, wherein a voltage obtained by dividing an output voltage of the chopper circuit to a constant value is input to one of an error amplifier circuit and a reference voltage is supplied to the other. In the chopper circuit for controlling the output voltage to a constant value multiple of the reference voltage, after turning on the reference voltage applied to the error amplifier, an integrating circuit for gradually increasing the reference voltage is connected to the error amplifier and the reference voltage reference. A power supply circuit provided between the power supply circuit and a reset circuit that detects a voltage rectified and smoothed separately from the input of the chopper circuit and discharges the output of the integration circuit when the commercial AC power supply stops momentarily.
JP9230676A 1997-08-27 1997-08-27 Power supply circuit Pending JPH1169785A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9230676A JPH1169785A (en) 1997-08-27 1997-08-27 Power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9230676A JPH1169785A (en) 1997-08-27 1997-08-27 Power supply circuit

Publications (1)

Publication Number Publication Date
JPH1169785A true JPH1169785A (en) 1999-03-09

Family

ID=16911566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9230676A Pending JPH1169785A (en) 1997-08-27 1997-08-27 Power supply circuit

Country Status (1)

Country Link
JP (1) JPH1169785A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1378980A1 (en) * 2002-07-04 2004-01-07 Vestel Elektronik Sanayi ve Ticaret A.S. DC power supply unit for consumer electronic products
JP2007074813A (en) * 2005-09-06 2007-03-22 Sharp Corp Power supply unit
US7222332B2 (en) 2002-10-24 2007-05-22 International Business Machines Corporation Method and apparatus for overlay management within an integrated executable for a heterogeneous architecture
JP2010011533A (en) * 2008-06-24 2010-01-14 Fujitsu General Ltd Power unit and equipment having the same
CN107546725A (en) * 2017-08-11 2018-01-05 上海空间电源研究所 A kind of spacecraft discharge circuit overvoltage protective system

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1378980A1 (en) * 2002-07-04 2004-01-07 Vestel Elektronik Sanayi ve Ticaret A.S. DC power supply unit for consumer electronic products
US7222332B2 (en) 2002-10-24 2007-05-22 International Business Machines Corporation Method and apparatus for overlay management within an integrated executable for a heterogeneous architecture
JP2007074813A (en) * 2005-09-06 2007-03-22 Sharp Corp Power supply unit
JP2010011533A (en) * 2008-06-24 2010-01-14 Fujitsu General Ltd Power unit and equipment having the same
CN107546725A (en) * 2017-08-11 2018-01-05 上海空间电源研究所 A kind of spacecraft discharge circuit overvoltage protective system
CN107546725B (en) * 2017-08-11 2019-04-12 上海空间电源研究所 A kind of spacecraft discharge circuit overvoltage protective system

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